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authorAlexandru Gagniuc <mr.nuke.me@gmail.com>2015-10-05 08:00:51 -0700
committerMartin Roth <martinroth@google.com>2015-12-30 18:34:08 +0100
commit8a13743569a8d1ac61b8a52d2dab621ff4041de2 (patch)
tree4ee4ef61e8aab9d8ac72ad17390ae8c7c35350cb /src/southbridge/sis
parentacc94a73bab2ede4e876e58c2de53ee0551f703c (diff)
downloadcoreboot-8a13743569a8d1ac61b8a52d2dab621ff4041de2.tar.xz
x86 chipsets: Link non-code flow CHIPSET_BOOTBLOCK_INCLUDE files
Non-code flow assembly stubs do not have to be included in bootblock.S, now that we have more freedom in bootblock linking. Rather than bringing these stubs to the config system, just link them in the bootblock. Note that we cannot fully remove CHIPSET_BOOTBLOCK_INCLUDE at this point, as some intel SOCs use this stub for code flow. objdump -h build/cbfs/fallback/bootblock.debug on a few random boards confirms that the appropriate sections are still included in the final binary. Change-Id: Id3f9ece14e399c1cc83090f407780c4a05a076f0 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: https://review.coreboot.org/11856 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/sis')
-rw-r--r--src/southbridge/sis/sis966/Kconfig4
-rw-r--r--src/southbridge/sis/sis966/Makefile.inc1
-rw-r--r--src/southbridge/sis/sis966/romstrap.S (renamed from src/southbridge/sis/sis966/romstrap.inc)0
3 files changed, 1 insertions, 4 deletions
diff --git a/src/southbridge/sis/sis966/Kconfig b/src/southbridge/sis/sis966/Kconfig
index 20f3bff2e3..c6023a9998 100644
--- a/src/southbridge/sis/sis966/Kconfig
+++ b/src/southbridge/sis/sis966/Kconfig
@@ -14,8 +14,4 @@ config EHCI_BAR
hex
default 0xfef00000
-config CHIPSET_BOOTBLOCK_INCLUDE
- string
- default "southbridge/sis/sis966/romstrap.inc"
-
endif
diff --git a/src/southbridge/sis/sis966/Makefile.inc b/src/southbridge/sis/sis966/Makefile.inc
index e703e1fcba..fa37762287 100644
--- a/src/southbridge/sis/sis966/Makefile.inc
+++ b/src/southbridge/sis/sis966/Makefile.inc
@@ -16,5 +16,6 @@ romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
bootblock-y += romstrap.ld
+bootblock-y += romstrap.S
endif
diff --git a/src/southbridge/sis/sis966/romstrap.inc b/src/southbridge/sis/sis966/romstrap.S
index 1eb39e3e6a..1eb39e3e6a 100644
--- a/src/southbridge/sis/sis966/romstrap.inc
+++ b/src/southbridge/sis/sis966/romstrap.S