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authorKevin Paul Herbert <kph@meraki.net>2014-12-24 18:43:20 -0800
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2015-02-15 08:50:22 +0100
commitbde6d309dfafe58732ec46314a2d4c08974b62d4 (patch)
tree17ba00565487ddfbb5759c96adfbb3fffe2a4550 /src/southbridge/sis
parent4b10dec1a66122b515b2191f823d7fd379ec655f (diff)
downloadcoreboot-bde6d309dfafe58732ec46314a2d4c08974b62d4.tar.xz
x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer
On x86, change the type of the address parameter in read8()/read16/read32()/write8()/write16()/write32() to be a pointer, instead of unsigned long. Change-Id: Ic26dd8a72d82828b69be3c04944710681b7bd330 Signed-off-by: Kevin Paul Herbert <kph@meraki.net> Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/7784 Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/sis')
-rw-r--r--src/southbridge/sis/sis966/aza.c18
-rw-r--r--src/southbridge/sis/sis966/lpc.c4
-rw-r--r--src/southbridge/sis/sis966/nic.c28
-rw-r--r--src/southbridge/sis/sis966/usb2.c8
4 files changed, 29 insertions, 29 deletions
diff --git a/src/southbridge/sis/sis966/aza.c b/src/southbridge/sis/sis966/aza.c
index 1a9462bb4c..ed812053aa 100644
--- a/src/southbridge/sis/sis966/aza.c
+++ b/src/southbridge/sis/sis966/aza.c
@@ -42,7 +42,7 @@ u8 SiS_SiS7502_init[7][3]={
{0x00, 0x00, 0x00} //End of table
};
-static int set_bits(u32 port, u32 mask, u32 val)
+static int set_bits(void *port, u32 mask, u32 val)
{
u32 dword;
int count;
@@ -67,7 +67,7 @@ static int set_bits(u32 port, u32 mask, u32 val)
}
-static u32 send_verb(u32 base, u32 verb)
+static u32 send_verb(u8 *base, u32 verb)
{
u32 dword;
@@ -75,7 +75,7 @@ static u32 send_verb(u32 base, u32 verb)
dword=dword|(unsigned long)0x0002;
write32(base + 0x68, dword);
do {
- dword = read32(base + 0x68);
+ dword = read32(base + 0x68);
} while ((dword & 1)!=0);
write32(base + 0x60, verb);
udelay(500);
@@ -92,7 +92,7 @@ static u32 send_verb(u32 base, u32 verb)
}
-static int codec_detect(u32 base)
+static int codec_detect(u8 *base)
{
u32 dword;
int idx=0;
@@ -194,7 +194,7 @@ static unsigned find_verb(u32 viddid, u32 **verb)
}
-static void codec_init(u32 base, int addr)
+static void codec_init(u8 *base, int addr)
{
u32 dword;
u32 *verb;
@@ -232,7 +232,7 @@ static void codec_init(u32 base, int addr)
printk(BIOS_DEBUG, "verb loaded!\n");
}
-static void codecs_init(u32 base, u32 codec_mask)
+static void codecs_init(u8 *base, u32 codec_mask)
{
codec_init(base, 0);
return;
@@ -240,7 +240,7 @@ static void codecs_init(u32 base, u32 codec_mask)
static void aza_init(struct device *dev)
{
- u32 base;
+ u8 *base;
struct resource *res;
u32 codec_mask;
@@ -286,8 +286,8 @@ static void aza_init(struct device *dev)
if(!res)
return;
- base = res->base;
- printk(BIOS_DEBUG, "base = 0x%08x\n", base);
+ base = res2mmio(res, 0, 0);
+ printk(BIOS_DEBUG, "base = 0x%p\n", base);
codec_mask = codec_detect(base);
diff --git a/src/southbridge/sis/sis966/lpc.c b/src/southbridge/sis/sis966/lpc.c
index a61883bd77..c9f1ff6583 100644
--- a/src/southbridge/sis/sis966/lpc.c
+++ b/src/southbridge/sis/sis966/lpc.c
@@ -59,13 +59,13 @@
static void lpc_common_init(device_t dev)
{
uint8_t byte;
- uint32_t ioapic_base;
+ void *ioapic_base;
/* IO APIC initialization */
byte = pci_read_config8(dev, 0x74);
byte |= (1<<0); // enable APIC
pci_write_config8(dev, 0x74, byte);
- ioapic_base = pci_read_config32(dev, PCI_BASE_ADDRESS_1); // 0x14
+ ioapic_base = (void *)pci_read_config32(dev, PCI_BASE_ADDRESS_1); // 0x14
setup_ioapic(ioapic_base, 0); // Don't rename IO APIC ID
}
diff --git a/src/southbridge/sis/sis966/nic.c b/src/southbridge/sis/sis966/nic.c
index b12c8314da..183260fdfc 100644
--- a/src/southbridge/sis/sis966/nic.c
+++ b/src/southbridge/sis/sis966/nic.c
@@ -133,7 +133,7 @@ static void set_apc(struct device *dev)
* @return Contents of EEPROM word (Reg).
*/
#define LoopNum 200
-static unsigned long ReadEEprom( struct device *dev, u32 base, u32 Reg)
+static unsigned long ReadEEprom( struct device *dev, u8 *base, u32 Reg)
{
u32 data;
u32 i;
@@ -142,13 +142,13 @@ static unsigned long ReadEEprom( struct device *dev, u32 base, u32 Reg)
ulValue = (0x80 | (0x2 << 8) | (Reg << 10)); //BIT_7
- write32(base+0x3c, ulValue);
+ write32(base + 0x3c, ulValue);
mdelay(10);
for(i=0 ; i <= LoopNum; i++)
{
- ulValue=read32(base+0x3c);
+ ulValue=read32(base + 0x3c);
if(!(ulValue & 0x0080)) //BIT_7
break;
@@ -160,14 +160,14 @@ static unsigned long ReadEEprom( struct device *dev, u32 base, u32 Reg)
if(i==LoopNum) data=0x10000;
else{
- ulValue=read32(base+0x3c);
+ ulValue=read32(base + 0x3c);
data = ((ulValue & 0xffff0000) >> 16);
}
return data;
}
-static int phy_read(u32 base, unsigned phy_addr, unsigned phy_reg)
+static int phy_read(u8 *base, unsigned phy_addr, unsigned phy_reg)
{
u32 ulValue;
u32 Read_Cmd;
@@ -181,14 +181,14 @@ static int phy_read(u32 base, unsigned phy_addr, unsigned phy_reg)
SMI_REQUEST);
// SmiMgtInterface Reg is the SMI management interface register(offset 44h) of MAC
- write32(base+0x44, Read_Cmd);
+ write32(base + 0x44, Read_Cmd);
// Polling SMI_REQ bit to be deasserted indicated read command completed
do
{
// Wait 20 usec before checking status
mdelay(20);
- ulValue = read32(base+0x44);
+ ulValue = read32(base + 0x44);
} while((ulValue & SMI_REQUEST) != 0);
//printk(BIOS_DEBUG, "base %x cmd %lx ret val %lx\n", tmp,Read_Cmd,ulValue);
usData=(ulValue>>16);
@@ -201,7 +201,7 @@ static int phy_read(u32 base, unsigned phy_addr, unsigned phy_reg)
// Detect a valid PHY
// If there exist a valid PHY then return TRUE, else return FALSE
-static int phy_detect(u32 base,u16 *PhyAddr) //BOOL PHY_Detect()
+static int phy_detect(u8 *base,u16 *PhyAddr) //BOOL PHY_Detect()
{
int bFoundPhy = FALSE;
u16 usData;
@@ -238,7 +238,7 @@ static void nic_init(struct device *dev)
{
int val;
u16 PhyAddr;
- u32 base;
+ u8 *base;
struct resource *res;
printk(BIOS_DEBUG, "NIC_INIT:---------->\n");
@@ -269,8 +269,8 @@ static void nic_init(struct device *dev)
printk(BIOS_DEBUG, "NIC Cannot find resource..\n");
return;
}
- base = res->base;
- printk(BIOS_DEBUG, "NIC base address %x\n",base);
+ base = res2mmio(res, 0, 0);
+ printk(BIOS_DEBUG, "NIC base address %p\n",base);
if(!(val=phy_detect(base,&PhyAddr)))
{
@@ -299,9 +299,9 @@ static void nic_init(struct device *dev)
}else{
// read MAC address from firmware
printk(BIOS_DEBUG, "EEPROM invalid!!\nReg 0x38h=%.8lx \n",ulValue);
- MacAddr[0]=read16(0xffffffc0); // mac address store at here
- MacAddr[1]=read16(0xffffffc2);
- MacAddr[2]=read16(0xffffffc4);
+ MacAddr[0]=read16((u16 *)0xffffffc0); // mac address store at here
+ MacAddr[1]=read16((u16 *)0xffffffc2);
+ MacAddr[2]=read16((u16 *)0xffffffc4);
}
set_apc(dev);
diff --git a/src/southbridge/sis/sis966/usb2.c b/src/southbridge/sis/sis966/usb2.c
index c6f40271e5..94eabd5d81 100644
--- a/src/southbridge/sis/sis966/usb2.c
+++ b/src/southbridge/sis/sis966/usb2.c
@@ -66,7 +66,7 @@ static const u8 SiS_SiS7002_init[22][3]={
static void usb2_init(struct device *dev)
{
- u32 base;
+ u8 *base;
struct resource *res;
int i;
u8 temp8;
@@ -89,9 +89,9 @@ static void usb2_init(struct device *dev)
if(!res)
return;
- base = res->base;
- printk(BIOS_DEBUG, "base = 0x%08x\n", base);
- write32(base+0x20, 0x2);
+ base = res2mmio(res, 0, 0);
+ printk(BIOS_DEBUG, "base = 0x%p\n", base);
+ write32(base + 0x20, 0x2);
//-------------------------------------------------------------
#if DEBUG_USB2