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author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-10-17 19:30:58 +0000 |
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committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-10-17 19:30:58 +0000 |
commit | c6a106286bb30bd0532ffdd2443e8add52072967 (patch) | |
tree | 9c6692baa12aa1d3827b067dc23245607d5a8c6f /src/southbridge/sis | |
parent | 8af6d5574ba6d9ea847b27ae582396240b3e8d41 (diff) | |
download | coreboot-c6a106286bb30bd0532ffdd2443e8add52072967.tar.xz |
Add more missing GPL-headers, fix inconsistencies in others.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5957 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/sis')
-rw-r--r-- | src/southbridge/sis/sis966/sis761.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/src/southbridge/sis/sis966/sis761.c b/src/southbridge/sis/sis966/sis761.c index 43a235b01f..f1d1fe26d8 100644 --- a/src/southbridge/sis/sis966/sis761.c +++ b/src/southbridge/sis/sis966/sis761.c @@ -1,6 +1,9 @@ /* * This file is part of the coreboot project. * + * Copyright (C) 2007 Silicon Integrated Systems Corp. (SiS) + * Written by Morgan Tsai <my_tsai@sis.com> for SiS. + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or @@ -14,7 +17,9 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * + */ + +/* * Turn off machine check triggers when reading * pci space where there are no devices. * This is necessary when scaning the bus for @@ -24,9 +29,6 @@ * * - Athlon64 workarounds by Stefan Reinauer * - "reset once" logic by Yinghai Lu - * Copyright (C) 2007 Silicon Integrated Systems Corp. (SiS) - * Written by Morgan Tsai <my_tsai@sis.com> for SiS. - * */ #include <console/console.h> |