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author | Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> | 2012-02-21 22:29:30 +0100 |
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committer | Marc Jones <marcj303@gmail.com> | 2012-02-27 20:01:07 +0100 |
commit | 72bf6a1a48cb37497c112673dd17cd9c2c5971b1 (patch) | |
tree | a2e105c3e2d3499a654fa970970d149d381d9170 /src/southbridge/ti/pci7420 | |
parent | 4c796ea7c6f4971f2ff19ec707b3452da05c456e (diff) | |
download | coreboot-72bf6a1a48cb37497c112673dd17cd9c2c5971b1.tar.xz |
asus/m4a785t-m: correct the CPU microcode patch selection
Thanks to ruik on #coreboot Freenode IRC channel for
explaining to me how to get the cpu revision:
Feb 21 22:07:32 <ruik> ruik@ruik:~/coreboot$ cpuid | grep ^00000001
Feb 21 22:07:32 <ruik> 00000001 00020f32 00020800 00000001 178bfbff
[..]
Feb 21 22:07:44 <ruik> the 20f32 is mine CPUID
The rest was just looking at the correspondance in
src/cpu/amd/model_10xxx/update_microcode.c
like Marc Jones explained(thanks Marc Jones) in the mailing list here:
http://www.coreboot.org/pipermail/coreboot/2012-February/068332.html
Change-Id: Ie0f004990e6b65456de009a4dcc306498bdb47e9
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Reviewed-on: http://review.coreboot.org/669
Reviewed-by: Marc Jones <marcj303@gmail.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/ti/pci7420')
0 files changed, 0 insertions, 0 deletions