Add support for the Texas Instruments Cardbus+Firewire bridge TI PCI7420

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5029 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

9 files changed, 377 insertions, 0 deletions

diff --git a/src/southbridge/ti/Kconfig b/src/southbridge/ti/Kconfig
new file mode 100644
index 0000000000..79286637dd
--- /dev/null
+++ b/src/southbridge/ti/Kconfig
@@ -0,0 +1,20 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2008-2009 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+##
+
+source src/southbridge/ti/pci7420/Kconfig
diff --git a/src/southbridge/ti/Makefile.inc b/src/southbridge/ti/Makefile.inc
new file mode 100644
index 0000000000..0df59f53ab
--- /dev/null
+++ b/src/southbridge/ti/Makefile.inc
@@ -0,0 +1,20 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2008-2009 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+##
+
+subdirs-$(CONFIG_SOUTHBRIDGE_TI_PCI7420) += pci7420
diff --git a/src/southbridge/ti/pci7420/Config.lb b/src/southbridge/ti/pci7420/Config.lb
new file mode 100644
index 0000000000..10d412bddb
--- /dev/null
+++ b/src/southbridge/ti/pci7420/Config.lb
@@ -0,0 +1,22 @@
+##
+## (C) Copyright 2008-2009 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or
+## modify it under the terms of the GNU General Public License as
+## published by the Free Software Foundation; either version 2 of
+## the License, or (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+## MA 02110-1301 USA
+##
+
+config chip.h
+object pci7420_cardbus.o
+object pci7420_firewire.o
diff --git a/src/southbridge/ti/pci7420/Kconfig b/src/southbridge/ti/pci7420/Kconfig
new file mode 100644
index 0000000000..f821f1e843
--- /dev/null
+++ b/src/southbridge/ti/pci7420/Kconfig
@@ -0,0 +1,22 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2008-2009 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+##
+
+config SOUTHBRIDGE_TI_PCI7420
+	bool
+
diff --git a/src/southbridge/ti/pci7420/Makefile.inc b/src/southbridge/ti/pci7420/Makefile.inc
new file mode 100644
index 0000000000..50a0331a2d
--- /dev/null
+++ b/src/southbridge/ti/pci7420/Makefile.inc
@@ -0,0 +1,22 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2008-2009 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+##
+
+driver-y += pci7420_cardbus.o
+driver-y += pci7420_firewire.o
+
diff --git a/src/southbridge/ti/pci7420/chip.h b/src/southbridge/ti/pci7420/chip.h
new file mode 100644
index 0000000000..d6a0afca99
--- /dev/null
+++ b/src/southbridge/ti/pci7420/chip.h
@@ -0,0 +1,29 @@
+/*
+ * (C) Copyright 2008-2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef _SOUTHBRIDGE_TI_PCI7420
+#define _SOUTHBRIDGE_TI_PCI7420
+
+extern struct chip_operations southbridge_ti_pci7420_ops;
+
+struct southbridge_ti_pci7420_config {
+	int smartcard_enabled;
+};
+
+#endif /* _SOUTHBRIDGE_TI_PCI7420 */
diff --git a/src/southbridge/ti/pci7420/pci7420.h b/src/southbridge/ti/pci7420/pci7420.h
new file mode 100644
index 0000000000..3fd389ad90
--- /dev/null
+++ b/src/southbridge/ti/pci7420/pci7420.h
@@ -0,0 +1,48 @@
+/*
+ * (C) Copyright 2008-2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+		     // 0844d060 (old)
+#define SYSCTL	0x80 // 08405061
+#define   RIMUX		(1 << 0)
+
+#define GENCTL	0x86
+#define   FW1394_PRIO	(0 << 0)
+#define   CARDBUS_PRIO	(1 << 0)
+#define   FLASH_PRIO	(2 << 0)
+#define   ROUNDR_PRIO	(3 << 0)
+#define   DISABLE_OHCI  (1 << 3)
+#define   DISABLE_SKTB	(1 << 4)
+#define   DISABLE_FM	(1 << 5)
+#define   P12V_SW_SEL	(1 << 10)
+
+#define MFUNC	0x8c
+
+#define CARDCTL	0x91
+#define   SPKROUTEN	(1 << 1)
+
+#define DEVCTL	0x92
+#define   INT_MODE_PAR	(0 << 1)
+#define   INT_MODE_RSV  (1 << 1)
+#define   INT_MODE_MIX  (2 << 1)
+#define   INT_MODE_SER  (3 << 1)
+
+#define INTA 0
+#define INTB 1
+#define INTC 2
+#define INTD 3
+
diff --git a/src/southbridge/ti/pci7420/pci7420_cardbus.c b/src/southbridge/ti/pci7420/pci7420_cardbus.c
new file mode 100644
index 0000000000..0e95d08e88
--- /dev/null
+++ b/src/southbridge/ti/pci7420/pci7420_cardbus.c
@@ -0,0 +1,127 @@
+/*
+ * (C) Copyright 2008-2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include <arch/io.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ops.h>
+#include <device/pci_ids.h>
+#include <console/console.h>
+#include <device/cardbus.h>
+#include "pci7420.h"
+#include "chip.h"
+
+#ifdef ODD_IRQ_FIXUP
+static int cardbus_count = 0;
+#endif
+
+static void pci7420_cardbus_init(device_t dev)
+{
+	u8 reg8;
+	u16 reg16;
+	u32 reg32;
+
+	struct southbridge_ti_pci7420_config *config = dev->chip_info;
+	int smartcard_enabled = 0;
+
+	printk_debug("TI PCI7420/7620 init\n");
+
+	if (!config) {
+		printk_debug("PCI7420: No configuration found.\n");
+	} else {
+		smartcard_enabled = config->smartcard_enabled;
+	}
+
+	reg32 = pci_read_config32(dev, SYSCTL);
+	reg32 |= RIMUX;
+	pci_write_config32(dev, SYSCTL, reg32);
+
+	/* Enable SPKROUT */
+	reg8 = pci_read_config8(dev, CARDCTL);
+	reg8 |= SPKROUTEN;
+	pci_write_config8(dev, CARDCTL, reg8);
+
+	/* Power switch select and FM disable */
+	reg16 = pci_read_config16(dev, GENCTL);
+	reg16 |= P12V_SW_SEL; // 12V capable power switch
+	if (smartcard_enabled == 0)
+		reg16 |= DISABLE_FM;
+	pci_write_config16(dev, GENCTL, reg16);
+
+	/* Multifunction routing status */
+	pci_write_config32(dev, MFUNC, 0x018a1b22);
+
+#ifdef ODD_IRQ_FIXUP
+	/* This is a workaround for buggy kernels. This should
+	 * probably be read from the device tree, but as long
+	 * as only one mainboard is using this bridge it does
+	 * not matter.
+	 *
+	 * Basically what we do here is assign INTA to the first
+	 * cardbus controller, and INTB to the second one. We know
+	 * there are only two of them.
+	 */
+	pci_write_config8(dev, PCI_INTERRUPT_PIN, cardbus_count);
+	cardbus_count++;
+#endif
+}
+
+void pci7420_cardbus_read_resources(device_t dev)
+{
+	cardbus_read_resources(dev);
+}
+
+void pci7420_cardbus_set_resources(device_t dev)
+{
+	printk_debug("%s In set resources \n",dev_path(dev));
+
+	pci_dev_set_resources(dev);
+
+	printk_debug("%s done set resources \n",dev_path(dev));
+}
+
+static struct device_operations ti_pci7420_ops = {
+	.read_resources   = pci7420_cardbus_read_resources,
+	.set_resources    = pci7420_cardbus_set_resources,
+	.enable_resources = cardbus_enable_resources,
+	.init             = pci7420_cardbus_init,
+	.scan_bus         = cardbus_scan_bridge,
+};
+
+static const struct pci_driver ti_pci7420_driver __pci_driver = {
+	.ops    = &ti_pci7420_ops,
+	.vendor = 0x104c,
+	.device = 0xac8e,
+};
+
+static const struct pci_driver ti_pci7620_driver __pci_driver = {
+	.ops    = &ti_pci7420_ops,
+	.vendor = 0x104c,
+	.device = 0xac8d,
+};
+
+static void ti_pci7420_enable_dev(device_t dev)
+{
+	/* Nothing here yet */
+}
+
+struct chip_operations southbridge_ti_pci7420_ops = {
+	CHIP_NAME("Texas Instruments PCI7420/7620 Cardbus Controller")
+	.enable_dev    = ti_pci7420_enable_dev,
+};
diff --git a/src/southbridge/ti/pci7420/pci7420_firewire.c b/src/southbridge/ti/pci7420/pci7420_firewire.c
new file mode 100644
index 0000000000..3dbb797646
--- /dev/null
+++ b/src/southbridge/ti/pci7420/pci7420_firewire.c
@@ -0,0 +1,67 @@
+/*
+ * (C) Copyright 2008-2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include <arch/io.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ops.h>
+#include <device/pci_ids.h>
+#include <console/console.h>
+#include <device/cardbus.h>
+#include "pci7420.h"
+#include "chip.h"
+
+static void pci7420_firewire_init(device_t dev)
+{
+	u8 reg8;
+
+	printk_debug("TI PCI7420/7620 FireWire init\n");
+
+#ifdef ODD_IRQ_FIXUP
+	/* This is a workaround for buggy kernels. This should
+	 * probably be read from the device tree, but as long
+	 * as only one mainboard is using this bridge it does
+	 * not matter
+	 */
+	pci_write_config8(dev, PCI_INTERRUPT_PIN, INTC);
+#endif
+}
+
+static struct device_operations ti_pci7420_firewire_ops = {
+	.read_resources   = pci_dev_read_resources,
+	.set_resources    = pci_dev_set_resources,
+	.enable_resources = pci_dev_enable_resources,
+	.init             = pci7420_firewire_init,
+};
+
+static const struct pci_driver ti_pci7420_driver __pci_driver = {
+	.ops    = &ti_pci7420_firewire_ops,
+	.vendor = 0x104c,
+	.device = 0x802e,
+};
+
+static void ti_pci7420_firewire_enable_dev(device_t dev)
+{
+	/* Nothing here yet */
+}
+
+struct chip_operations southbridge_ti_pci7420_firewire_ops = {
+	CHIP_NAME("Texas Instruments PCI7420/7620 FireWire (IEEE 1394)")
+	.enable_dev    = ti_pci7420_firewire_enable_dev,
+};