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authorFlorian Zumbiehl <florz@florz.de>2011-11-01 20:19:01 +0100
committerPatrick Georgi <patrick@georgi-clan.de>2011-11-07 19:17:30 +0100
commit0802ad90ccfb6caa270918b5fc7aa628cf2a0378 (patch)
tree77adba6fd0575182724f68e32220cb3678238218 /src/southbridge/via/k8t890/ctrl.c
parent1e1e8593bc9218c62dc187ce965020045ab385ea (diff)
downloadcoreboot-0802ad90ccfb6caa270918b5fc7aa628cf2a0378.tar.xz
rename vt8237r_cfg() to k8x8xx_vt8237r_cfg() and make publicly accessible
Change-Id: I82d1ec5117a58aaa8cfd2a342b7172a2786f5680 Signed-off-by: Florian Zumbiehl <florz@florz.de> Reviewed-on: http://review.coreboot.org/379 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/southbridge/via/k8t890/ctrl.c')
-rw-r--r--src/southbridge/via/k8t890/ctrl.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/via/k8t890/ctrl.c b/src/southbridge/via/k8t890/ctrl.c
index 73635105f9..d68e03e5f0 100644
--- a/src/southbridge/via/k8t890/ctrl.c
+++ b/src/southbridge/via/k8t890/ctrl.c
@@ -29,7 +29,7 @@
* PCI device 0:11.7, but it is mapped to PCI 0:0.7 (0x70-0x7c for PCI1)
*/
-static void vt8237r_cfg(struct device *dev, struct device *devsb)
+void k8x8xx_vt8237r_cfg(struct device *dev, struct device *devsb)
{
u8 regm3;
struct k8x8xx_vt8237_mirrored_regs mregs;
@@ -145,7 +145,7 @@ static void ctrl_init(struct device *dev)
PCI_DEVICE_ID_VIA_VT8237R_LPC, 0);
if (devsb) {
vt8237r_vlink_init(dev);
- vt8237r_cfg(dev, devsb);
+ k8x8xx_vt8237r_cfg(dev, devsb);
} else {
print_debug("VT8237R LPC not found !\n");
return;