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authorstepan <stepan@coresystems.de>2010-12-08 05:42:47 +0000
committerStefan Reinauer <stepan@openbios.org>2010-12-08 05:42:47 +0000
commit836ae29ee325b1e3d28ff59468cc50913b1e24ce (patch)
treee2691a1e1ee1d795ffe7a99fb93778a9910044c2 /src/southbridge/via/vt8235/early_serial.c
parent1bc5ccac51d94cfb4f9666ecf2cac619d8dc80a6 (diff)
downloadcoreboot-836ae29ee325b1e3d28ff59468cc50913b1e24ce.tar.xz
first round name simplification. drop the <component>_ prefix.
the prefix was introduced in the early v2 tree many years ago because our old build system "newconfig" could not handle two files with the same name in different paths like /path/to/usb.c and /another/path/to/usb.c correctly. Only one of the files would end up being compiled into the final image. Since Kconfig (actually since shortly before we switched to Kconfig) we don't suffer from that problem anymore. So we could drop the sb700_ prefix from all those filenames (or, the <componentname>_ prefix in general) - makes it easier to fork off a new chipset - makes it easier to diff against other chipsets - storing redundant information in filenames seems wrong Signed-off-by: <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick@georgi-clan.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6149 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/via/vt8235/early_serial.c')
-rw-r--r--src/southbridge/via/vt8235/early_serial.c77
1 files changed, 77 insertions, 0 deletions
diff --git a/src/southbridge/via/vt8235/early_serial.c b/src/southbridge/via/vt8235/early_serial.c
new file mode 100644
index 0000000000..11f98fae39
--- /dev/null
+++ b/src/southbridge/via/vt8235/early_serial.c
@@ -0,0 +1,77 @@
+/*
+ * Enable the serial evices on the VIA
+ */
+
+
+/* The base address is 0x15c, 0x2e, depending on config bytes */
+
+#define SIO_BASE 0x3f0
+#define SIO_DATA SIO_BASE+1
+
+static void vt8235_writepnpaddr(uint8_t val)
+{
+ outb(val, 0x2e);
+ outb(val, 0xeb);
+}
+
+static void vt8235_writepnpdata(uint8_t val)
+{
+ outb(val, 0x2f);
+ outb(val, 0xeb);
+}
+
+
+static void vt8235_writesiobyte(uint16_t reg, uint8_t val)
+{
+ outb(val, reg);
+}
+
+static void vt8235_writesioword(uint16_t reg, uint16_t val)
+{
+ outw(val, reg);
+}
+
+
+/* regs we use: 85, and the southbridge devfn is defined by the
+ mainboard
+ */
+
+static void enable_vt8235_serial(void)
+{
+ // turn on pnp
+ vt8235_writepnpaddr(0x87);
+ vt8235_writepnpaddr(0x87);
+ // now go ahead and set up com1.
+ // set address
+ vt8235_writepnpaddr(0x7);
+ vt8235_writepnpdata(0x2);
+ // enable serial out
+ vt8235_writepnpaddr(0x30);
+ vt8235_writepnpdata(0x1);
+ // serial port 1 base address (FEh)
+ vt8235_writepnpaddr(0x60);
+ vt8235_writepnpdata(0xfe);
+ // serial port 1 IRQ (04h)
+ vt8235_writepnpaddr(0x70);
+ vt8235_writepnpdata(0x4);
+ // serial port 1 control
+ vt8235_writepnpaddr(0xf0);
+ vt8235_writepnpdata(0x2);
+ // turn of pnp
+ vt8235_writepnpaddr(0xaa);
+
+ // set up reg to set baud rate.
+ vt8235_writesiobyte(0x3fb, 0x80);
+ // Set 115 kb
+ vt8235_writesioword(0x3f8, 1);
+ // Set 9.6 kb
+ // WRITESIOWORD(0x3f8, 12)
+ // now set no parity, one stop, 8 bits
+ vt8235_writesiobyte(0x3fb, 3);
+ // now turn on RTS, DRT
+ vt8235_writesiobyte(0x3fc, 3);
+ // Enable interrupts
+ vt8235_writesiobyte(0x3f9, 0xf);
+ // should be done. Dump a char for fun.
+ vt8235_writesiobyte(0x3f8, 48);
+}