EPIA-M fixup

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2090 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

5 files changed, 116 insertions, 63 deletions

diff --git a/src/southbridge/via/vt8235/vt8235.c b/src/southbridge/via/vt8235/vt8235.c
index ea649a418c..e6287ece9c 100644
--- a/src/southbridge/via/vt8235/vt8235.c
+++ b/src/southbridge/via/vt8235/vt8235.c
@@ -10,7 +10,7 @@
 /*
  * Base VT8235.
  */
-static device_t lpc_dev;
+static int enabled = 0;
 
 void hard_reset(void) 
 {
@@ -22,18 +22,15 @@ static void keyboard_on(struct device *dev)
 	unsigned char regval;
 
 	regval = pci_read_config8(dev, 0x51);
-//	regval |= 0x0f; 
-	/* !!!FIX let's try this */
-	regval |= 0x1d; 
+	regval |= 0x05; 
+	regval &= 0xfd;
 	pci_write_config8(dev, 0x51, regval);
 
 	init_pc_keyboard(0x60, 0x64, 0);
 }
 
-void dump_south(void)
+void dump_south(device_t dev0)
 {
-	device_t dev0;
-	dev0 = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, 0);
 	int i,j;
 	
 	for(i = 0; i < 256; i += 16) {
@@ -45,23 +42,53 @@ void dump_south(void)
 	}
 }
 
-void set_led(struct device *dev)
+void set_led()
 {
 	// set power led to steady now that lxbios has virtually done its job
+	device_t dev;
+	dev = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, 0);
 	pci_write_config8(dev, 0x94, 0xb0);
 }
 
+
 static void vt8235_enable(struct device *dev)
 {
 	struct southbridge_via_vt8235_config *conf = dev->chip_info;
+	unsigned char regval;
+	unsigned short vendor,model;
+
+
+	vendor = pci_read_config16(dev,0);
+	model = pci_read_config16(dev,0x2);
+
+	printk_debug("In vt8235_enable %04x %04x.\n",vendor,model);
+	
+	/* if this is not the southbridge itself just return */
+	/* this is necessary because USB devices are slot 10, whereas this device is slot 11 
+	  therefore usb devices get called first during the bus scan */
+
+	if( (vendor != PCI_VENDOR_ID_VIA) || (model != PCI_DEVICE_ID_VIA_8235))
+		return;
+
+	printk_debug("Initialising Devices\n");
+
+
+	setup_i8259();   // make sure interupt controller is configured before keyboard init 
+
+	/* enable RTC and ethernet */
+	regval = pci_read_config8(dev, 0x51);
+	regval |= 0x18; 
+	pci_write_config8(dev, 0x51, regval);
+
+	/* turn on keyboard */
+	keyboard_on(dev);
+
+	/* enable USB 1.1 & USB 2.0 -redundant really since we've already been there - see note above*/
+   	regval = pci_read_config8(dev, 0x50);
+	regval &= ~(0x36);
+	pci_write_config8(dev, 0x50, regval);
+
 
-	printk_debug("In vt8235_enable.\n");
-	if (!lpc_dev) {
-		lpc_dev = dev_find_device(PCI_VENDOR_ID_VIA,
-				PCI_DEVICE_ID_VIA_8235, 0);
-		if (conf->enable_keyboard)
-			keyboard_on(lpc_dev);
-	}
 }
 
 struct chip_operations southbridge_via_vt8235_ops = {
diff --git a/src/southbridge/via/vt8235/vt8235.h b/src/southbridge/via/vt8235/vt8235.h
index c8e79fc480..f071371938 100644
--- a/src/southbridge/via/vt8235/vt8235.h
+++ b/src/southbridge/via/vt8235/vt8235.h
@@ -17,8 +17,8 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
  */
 
  /* winbond access routines and defines*/
diff --git a/src/southbridge/via/vt8235/vt8235_ide.c b/src/southbridge/via/vt8235/vt8235_ide.c
index 1775203ca8..fedda9c3be 100644
--- a/src/southbridge/via/vt8235/vt8235_ide.c
+++ b/src/southbridge/via/vt8235/vt8235_ide.c
@@ -13,7 +13,7 @@ static void ide_init(struct device *dev)
 
 	printk_info("Enabling VIA IDE.\n");
 
-	if (!conf->enable_native_ide) {
+	/*if (!conf->enable_native_ide) { */
 		/*
 		 * Run the IDE controller in 'compatiblity mode - i.e. don't
 		 * use PCI interrupts.  Using PCI ints confuses linux for some
@@ -28,7 +28,7 @@ static void ide_init(struct device *dev)
 		enables = pci_read_config8(dev, 0x42);
 		printk_debug("enables in reg 0x42 read back as 0x%x\n",
 				enables);
-	}
+	/* } */
 	
 	enables = pci_read_config8(dev, 0x40);
 	printk_debug("enables in reg 0x40 0x%x\n", enables);
diff --git a/src/southbridge/via/vt8235/vt8235_lpc.c b/src/southbridge/via/vt8235/vt8235_lpc.c
index 4a3c683f61..3e220940cd 100644
--- a/src/southbridge/via/vt8235/vt8235_lpc.c
+++ b/src/southbridge/via/vt8235/vt8235_lpc.c
@@ -10,21 +10,30 @@
 #include "vt8235.h"
 #include "chip.h"
 
-/*
- * Taken some liberties - changed irq structures to pins numbers so that it is
- * easier to change PCI irq assignments without having to change each PCI
- * function individually
- * 
- * pciIrqs contains the irqs assigned for PCI pins A-D
- * 
- * Setting will depend on motherboard as irqs can be quite scarce e.g on
- * EPIA-MII, 16 bit CF card wants a dedicated IRQ. A 16 bit card in pcmcia
- * socket may want another - for now only claim 3 interupts for PCI, leaving at
- * least one spare for CF.  On EPIA-M one could allocated all four irqs to
- * different numbers since there are no cardbus devices
- */
-
-static const unsigned char pciIrqs[4] = { 11 , 5, 10 , 12 };
+/* The epia-m is really short on interrupts available, so PCI interupts A & D are ganged togther and so are B & C.
+   This is how the Award bios sets it up too.
+   epia can be more generous as it does not need to reserve interrupts for cardbus devices, but if changed then
+   make sure that ACPI dsdt is changed to suit.
+
+	IRQ 0 = timer
+	IRQ 1 = keyboard
+	IRQ 2 = cascade
+	IRQ 3 = COM 2
+	IRQ 4 = COM 1
+	IRQ 5 = available for PCI interrupts
+	IRQ 6 = floppy or availbale for PCI if floppy controller disabled
+        IRQ 7 = LPT or available if LPT port disabled
+	IRQ 8 = rtc
+	IRQ 9 = available for PCI interrupts
+	IRQ 10 = cardbus slot or available for PCI if no cardbus (ie epia)
+	IRQ 11 = cardbus slot or available for PCI if no cardbus (ie epia)
+	IRQ 12 = PS2 mouse (hardwired to 12)
+	IRQ 13 = legacy FPU interrupt
+	IRQ 14 = IDE controller 1
+	IRQ 15 = IDE controller 2
+
+*/
+static const unsigned char pciIrqs[4] = { 5 , 9 , 9, 5 };
 
 static const unsigned char usbPins[4] =      { 'A','B','C','D'};
 static const unsigned char enetPins[4] =     { 'A','B','C','D'};
@@ -32,14 +41,9 @@ static const unsigned char slotPins[4] =     { 'B','C','D','A'};
 static const unsigned char firewirePins[4] = { 'B','C','D','A'};
 static const unsigned char vt8235Pins[4] =   { 'A','B','C','D'};
 static const unsigned char vgaPins[4] =      { 'A','B','C','D'};
-static const unsigned char cbPins[4] =       { 'A','B','C','D'};
+static const unsigned char cbPins[4] =       { 'D','A','B','C'};
 static const unsigned char riserPins[4] =    { 'A','B','C','D'};
 
-/*
-	Our IDSEL mappings are as follows
-	PCI slot is AD31          (device 15) (00:14.0)
-	Southbridge is AD28       (device 12) (00:11.0)
-*/
 
 static unsigned char *pin_to_irq(const unsigned char *pin)
 {
@@ -54,19 +58,12 @@ static unsigned char *pin_to_irq(const unsigned char *pin)
 static void pci_routing_fixup(struct device *dev)
 {
 	printk_info("%s: dev is %p\n", __FUNCTION__, dev);
-	if (dev) {
-		/* initialize PCI interupts - these assignments depend
-		   on the PCB routing of PINTA-D 
-
-		   PINTA = IRQ11
-		   PINTB = IRQ5
-		   PINTC = IRQ10
-		   PINTD = IRQ12
-		*/
-		pci_write_config8(dev, 0x55, pciIrqs[0] << 4);
-		pci_write_config8(dev, 0x56, pciIrqs[1] | (pciIrqs[2] << 4) );
-		pci_write_config8(dev, 0x57, pciIrqs[3] << 4);
-	}
+
+	/* set up PCI IRQ routing */
+	pci_write_config8(dev, 0x55, pciIrqs[0] << 4);
+	pci_write_config8(dev, 0x56, pciIrqs[1] | (pciIrqs[2] << 4) );
+	pci_write_config8(dev, 0x57, pciIrqs[3] << 4);
+
 
 	// firewire built into southbridge
 	printk_info("setting firewire\n");
@@ -201,12 +198,6 @@ static void vt8235_init(struct device *dev)
 	// Set 0x58 to 0x03 to match Award
 	pci_write_config8(dev, 0x58, 0x03);
 	
-	// enable the ethernet/RTC
-	if (dev) {
-		enables = pci_read_config8(dev, 0x51);
-		enables |= 0x18; 
-		pci_write_config8(dev, 0x51, enables);
-	}
 	
 	/* enable serial irq */
 	pci_write_config8(dev, 0x52, 0x9);
@@ -224,6 +215,36 @@ static void vt8235_init(struct device *dev)
 	rtc_init(0);
 }
 
+/* total kludge to get lxb to call our childrens set/enable functions - these are not called unless this
+   device has a resource to set - so set a dummy one */
+void vt8235_read_resources(device_t dev)
+{
+
+	struct resource *resource;
+	pci_dev_read_resources(dev);
+	resource = new_resource(dev, 1);
+	resource->flags |= IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO | IORESOURCE_STORED;
+	resource->size = 2;
+	resource->base = 0x2e;
+
+}
+void vt8235_set_resources(device_t dev)
+{
+	struct resource *resource;
+	//resource = find_resource(dev,1);
+	//resource->flags |= IORESOURCE_STORED;
+	pci_dev_set_resources(dev);
+}
+
+void vt8235_enable_resources(device_t dev)
+{
+	/* vt8235 is not a pci bridge and has no resources of its own (other than standard PC i/o addresses)
+           however it does control the isa bus and so we need to manually call enable childrens resources on that bus */
+	pci_dev_enable_resources(dev);
+	enable_childrens_resources(dev);
+
+}
+	
 static void southbridge_init(struct device *dev)
 {
 	vt8235_init(dev);
@@ -231,9 +252,9 @@ static void southbridge_init(struct device *dev)
 }
 
 static struct device_operations vt8235_lpc_ops = {
-	.read_resources   = pci_dev_read_resources,
-	.set_resources    = pci_dev_set_resources,
-	.enable_resources = pci_dev_enable_resources,
+	.read_resources   = vt8235_read_resources,
+	.set_resources    = vt8235_set_resources,
+	.enable_resources = vt8235_enable_resources,
 	.init             = &southbridge_init,
 	.scan_bus         = scan_static_bus,
 };
diff --git a/src/southbridge/via/vt8235/vt8235_usb.c b/src/southbridge/via/vt8235/vt8235_usb.c
index 24c6a17acb..8142c535da 100644
--- a/src/southbridge/via/vt8235/vt8235_usb.c
+++ b/src/southbridge/via/vt8235/vt8235_usb.c
@@ -5,11 +5,14 @@
 #include <device/pci_ids.h>
 #include "vt8235.h"
 
+/* really nothing to do here, both usb 1.1 & 2.0 are normal PCI devices and so get resources allocated
+   properly. They are part of the southbridge and are enabled in the chip enable function for the southbridge */
+
 static void usb_init(struct device *dev)
 {
 	printk_debug("Configuring VIA USB 1.1\n");
 
-	pci_write_config8(dev, 0x04, 0x07);
+	/* pci_write_config8(dev, 0x04, 0x07); */
 
 	/*
 	 * To disable; though do we need to do this?
@@ -25,6 +28,7 @@ static void usb_init(struct device *dev)
 	 */
 }
 
+/*
 static struct device_operations usb_ops = {
 	.read_resources   = pci_dev_read_resources,
 	.set_resources    = pci_dev_set_resources,
@@ -39,3 +43,4 @@ static struct pci_driver northbridge_driver __pci_driver = {
 	.vendor = PCI_VENDOR_ID_VIA,
 	.device = PCI_DEVICE_ID_VIA_82C586_2,
 };
+*/
\ No newline at end of file