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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-10-12 17:34:08 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-10-12 17:34:08 +0000 |
| commit | 74d1a6e8a166cd477f667a6fcb1e96b8a0cbdac1 (patch) | |
| tree | 9cbdbe86bd282da60bfcbef7108ca6790bcde94e /src/southbridge/via/vt8235 | |
| parent | 4ffde94c4ec51cdb24103ec13653e6f40513e1bb (diff) | |
| download | coreboot-74d1a6e8a166cd477f667a6fcb1e96b8a0cbdac1.tar.xz | |
We define IO_APIC_ADDR in <arch/ioapic.h>, let's use it.
As both ioapic.h and acpi.h define a macro named "NMI", rename one
of them (NMI -> NMIType in acpi.h).
Abuild-tested.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5943 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/via/vt8235')
| -rw-r--r-- | src/southbridge/via/vt8235/vt8235_lpc.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/southbridge/via/vt8235/vt8235_lpc.c b/src/southbridge/via/vt8235/vt8235_lpc.c index 15ff5392b2..b355ad0d88 100644 --- a/src/southbridge/via/vt8235/vt8235_lpc.c +++ b/src/southbridge/via/vt8235/vt8235_lpc.c @@ -4,9 +4,8 @@ #include <device/pci.h> #include <device/pci_ops.h> #include <device/pci_ids.h> - #include <pc80/mc146818rtc.h> - +#include <arch/ioapic.h> #include "chip.h" /* The epia-m is really short on interrupts available, so PCI interupts A & D are ganged togther and so are B & C. @@ -228,7 +227,7 @@ static void vt8235_read_resources(device_t dev) res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; res = new_resource(dev, 3); /* IOAPIC */ - res->base = 0xfec00000; + res->base = IO_APIC_ADDR; res->size = 0x00001000; res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; } |