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author | Florian Zumbiehl <florz@florz.de> | 2011-11-01 20:19:37 +0100 |
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committer | Rudolf Marek <r.marek@assembler.cz> | 2011-12-02 23:25:58 +0100 |
commit | b5320573c3a511723b75f93a22a19a0faf8ac4a7 (patch) | |
tree | 47bd0f59ed8d236c63f6e944a712f0c28b43b343 /src/southbridge/via/vt8237r/chip.h | |
parent | 98236ca7844ec36bf1e43a9d689b55fa409f0a4a (diff) | |
download | coreboot-b5320573c3a511723b75f93a22a19a0faf8ac4a7.tar.xz |
make GPIOs and misc configurable via devicetree
Change-Id: I9f70da76b5ea451f28a1ad9252c5d879fc4fe315
Signed-off-by: Florian Zumbiehl <florz@florz.de>
Reviewed-on: http://review.coreboot.org/387
Tested-by: build bot (Jenkins)
Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
Diffstat (limited to 'src/southbridge/via/vt8237r/chip.h')
-rw-r--r-- | src/southbridge/via/vt8237r/chip.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/southbridge/via/vt8237r/chip.h b/src/southbridge/via/vt8237r/chip.h index bbba5e4d85..510854716a 100644 --- a/src/southbridge/via/vt8237r/chip.h +++ b/src/southbridge/via/vt8237r/chip.h @@ -71,6 +71,11 @@ struct southbridge_via_vt8237r_config { u8 usb2_dpll_delay; u8 int_efgh_as_gpio; + u8 enable_gpo3; + u8 disable_gpo26_gpo27; + u8 enable_aol_2_smb_slave; + u8 enable_gpo5; + u8 gpio15_12_dir_output; }; #endif /* SOUTHBRIDGE_VIA_VT8237R_CHIP_H */ |