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authorStefan Reinauer <reinauer@chromium.org>2011-10-31 12:56:45 -0700
committerPatrick Georgi <patrick@georgi-clan.de>2011-11-01 19:07:45 +0100
commit5ff7c13e858a31addf1558731a12cf6c753b576d (patch)
tree82ed6cf7b45f3a86c2c43ab87383355ed6012d6c /src/southbridge/via/vt8237r/lpc.c
parent784544b934d67dc85ccfcf33e04ff148045836ad (diff)
downloadcoreboot-5ff7c13e858a31addf1558731a12cf6c753b576d.tar.xz
remove trailing whitespace
Change-Id: Ib91889a374515d36a2b12b53aeb12b6ea6e22732 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/364 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/southbridge/via/vt8237r/lpc.c')
-rw-r--r--src/southbridge/via/vt8237r/lpc.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/southbridge/via/vt8237r/lpc.c b/src/southbridge/via/vt8237r/lpc.c
index 3e2f215751..e59951702f 100644
--- a/src/southbridge/via/vt8237r/lpc.c
+++ b/src/southbridge/via/vt8237r/lpc.c
@@ -297,7 +297,7 @@ static void vt8237r_init(struct device *dev)
*/
pci_write_config8(dev, 0x48, 0x0c);
#else
-
+
#if CONFIG_SOUTHBRIDGE_VIA_K8T800
/* It seems that when we pair with the K8T800, we need to disable
* the A2 mask
@@ -310,7 +310,7 @@ static void vt8237r_init(struct device *dev)
*/
pci_write_config8(dev, 0x48, 0x8c);
#endif
-
+
#endif
southbridge_init_common(dev);
@@ -327,7 +327,7 @@ static void vt8237r_init(struct device *dev)
printk(BIOS_SPEW, "Leaving %s.\n", __func__);
printk(BIOS_SPEW, "And taking a dump:\n");
- dump_south(dev);
+ dump_south(dev);
}
static void vt8237a_init(struct device *dev)