Various cosmetics, coding style fixes, constifications (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2939 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 46 insertions, 37 deletions

diff --git a/src/southbridge/via/vt8237r/vt8237r_early_smbus.c b/src/southbridge/via/vt8237r/vt8237r_early_smbus.c
index e3e17111f3..8922188a70 100644
--- a/src/southbridge/via/vt8237r/vt8237r_early_smbus.c
+++ b/src/southbridge/via/vt8237r/vt8237r_early_smbus.c
@@ -26,15 +26,15 @@
 /**
  * Print an error, should it occur. If no error, just exit.
  *
- * @param host_status The data returned on the host status register after a
- * transaction is processed.
+ * @param host_status The data returned on the host status register after
+ *		      a transaction is processed.
  * @param loops The number of times a transaction was attempted.
  */
 static void smbus_print_error(u8 host_status, int loops)
 {
 	/* Check if there actually was an error. */
 	if ((host_status == 0x00 || host_status == 0x40 ||
-	    host_status == 0x42) && (loops < SMBUS_TIMEOUT))
+	     host_status == 0x42) && (loops < SMBUS_TIMEOUT))
 		return;
 
 	if (loops >= SMBUS_TIMEOUT)
@@ -46,13 +46,13 @@ static void smbus_print_error(u8 host_status, int loops)
 	if (host_status & (1 << 2))
 		print_err("Device error\r\n");
 	if (host_status & (1 << 1))
-		print_debug("Interrupt/SMI# Completed Successfully\r\n");
+		print_debug("Interrupt/SMI# completed successfully\r\n");
 	if (host_status & (1 << 0))
 		print_err("Host busy\r\n");
 }
 
 /**
- * Wait for the smbus to become ready to process the next transaction
+ * Wait for the SMBus to become ready to process the next transaction.
  */
 static void smbus_wait_until_ready(void)
 {
@@ -64,15 +64,17 @@ static void smbus_wait_until_ready(void)
 	/* Yes, this is a mess, but it's the easiest way to do it. */
 	while ((inb(SMBHSTSTAT) & 1) == 1 && loops < SMBUS_TIMEOUT)
 		++loops;
+
 	smbus_print_error(inb(SMBHSTSTAT), loops);
 }
 
 /**
- * Reset and take ownership of the smbus
+ * Reset and take ownership of the SMBus.
  */
 static void smbus_reset(void)
 {
 	outb(HOST_RESET, SMBHSTSTAT);
+
 	/* Datasheet says we have to read it to take ownership of SMBus. */
 	inb(SMBHSTSTAT);
 
@@ -82,10 +84,10 @@ static void smbus_reset(void)
 }
 
 /**
- * Read a byte from the smbus
+ * Read a byte from the SMBus.
  *
- * @param dimm The address location of the dimm on the smbus
- * @param offset The offset the data is located at
+ * @param dimm The address location of the DIMM on the SMBus.
+ * @param offset The offset the data is located at.
  */
 u8 smbus_read_byte(u8 dimm, u8 offset)
 {
@@ -98,6 +100,7 @@ u8 smbus_read_byte(u8 dimm, u8 offset)
 	PRINT_DEBUG("\r\n");
 
 	smbus_reset();
+
 	/* Clear host data port. */
 	outb(0x00, SMBHSTDAT0);
 	SMBUS_DELAY();
@@ -108,11 +111,10 @@ u8 smbus_read_byte(u8 dimm, u8 offset)
 	dimm |= 1;
 	outb(dimm, SMBXMITADD);
 	outb(offset, SMBHSTCMD);
+
 	/* Start transaction, byte data read. */
 	outb(0x48, SMBHSTCTL);
-
 	SMBUS_DELAY();
-
 	smbus_wait_until_ready();
 
 	val = inb(SMBHSTDAT0);
@@ -138,18 +140,18 @@ void enable_smbus(void)
 				       PCI_DEVICE_ID_VIA_VT8237R_LPC), 0);
 
 	if (dev == PCI_DEV_INVALID)
-		die("Power Management Controller not found\r\n");
+		die("Power management controller not found\r\n");
 
 	/* 7 = SMBus Clock from RTC 32.768KHz
 	 * 5 = Internal PLL reset from susp
 	 */
 	pci_write_config8(dev, VT8237R_POWER_WELL, 0xa0);
 
-	/* Enable SMBus */
+	/* Enable SMBus. */
 	pci_write_config16(dev, VT8237R_SMBUS_IO_BASE_REG,
-				VT8237R_SMBUS_IO_BASE | 0x1);
+			   VT8237R_SMBUS_IO_BASE | 0x1);
 
-	/* SMBus Host Configuration, enable */
+	/* SMBus Host Configuration, enable. */
 	pci_write_config8(dev, VT8237R_SMBUS_HOST_CONF, 0x01);
 
 	/* Make it work for I/O. */
@@ -162,17 +164,17 @@ void enable_smbus(void)
 }
 
 /**
- * A fixup for some systems that need time for the smbus to "warm up". This is 
- * needed on some vt823x based systems, where the smbus spurts out bad data for 
- * a short time after power on. This has been seen on the Via Epia-series and 
+ * A fixup for some systems that need time for the SMBus to "warm up". This is 
+ * needed on some VT823x based systems, where the SMBus spurts out bad data for 
+ * a short time after power on. This has been seen on the VIA Epia series and 
  * Jetway J7F2-series. It reads the ID byte from SMBus, looking for 
  * known-good data from a slot/address. Exits on either good data or a timeout.
  *
- * This should probably go into some global file, but one would need to be 
- * created just for it. If some other chip needs/wants it, we can worry about it
- * then.
+ * TODO: This should probably go into some global file, but one would need to
+ *       be created just for it. If some other chip needs/wants it, we can
+ *       worry about it then.
  *
- * @param ctrl The memory controller and smbus addresses
+ * @param ctrl The memory controller and SMBus addresses.
  */
 void smbus_fixup(const struct mem_controller *ctrl)
 {
@@ -181,24 +183,31 @@ void smbus_fixup(const struct mem_controller *ctrl)
 
 	ram_slots = ARRAY_SIZE(ctrl->channel0);
 	if (!ram_slots) {
-		print_err("smbus_fixup thinks there are no ram slots!\r\n");
+		print_err("smbus_fixup() thinks there are no RAM slots!\r\n");
 		return;
 	}
-	
-	PRINT_DEBUG("Waiting for smbus to warm up");
-		
-	/* Bad SPD data should be either 0 or 0xff, but YMMV. So we look for the
-	 * ID bytes of SDRAM, DDR, DDR2, and DDR3 (and anything in between).
-	 * vt8237r has only been seen on DDR and DDR2 based systems, so far */
-	for(i = 0; (i < SMBUS_TIMEOUT && ((result < SPD_MEMORY_TYPE_SDRAM) || 
-			(result > SPD_MEMORY_TYPE_SDRAM_DDR3))); i++)
-	{
-		if (current_slot > ram_slots) current_slot = 0;
-		result = smbus_read_byte(ctrl->channel0[current_slot], 
-							SPD_MEMORY_TYPE);
+
+	PRINT_DEBUG("Waiting for SMBus to warm up");
+
+	/*
+	 * Bad SPD data should be either 0 or 0xff, but YMMV. So we look for
+	 * the ID bytes of SDRAM, DDR, DDR2, and DDR3 (and anything in between).
+	 * VT8237R has only been seen on DDR and DDR2 based systems, so far.
+	 */
+	for (i = 0; (i < SMBUS_TIMEOUT && ((result < SPD_MEMORY_TYPE_SDRAM) ||
+				(result > SPD_MEMORY_TYPE_SDRAM_DDR3))); i++) {
+
+		if (current_slot > ram_slots)
+			current_slot = 0;
+
+		result = smbus_read_byte(ctrl->channel0[current_slot],
+					 SPD_MEMORY_TYPE);
 		current_slot++;
 		PRINT_DEBUG(".");
 	}
-	if (i >= SMBUS_TIMEOUT)	print_err("SMBus timed out while warming up\r\n");
-	else PRINT_DEBUG("Done\r\n");	
+
+	if (i >= SMBUS_TIMEOUT)
+		print_err("SMBus timed out while warming up\r\n");
+	else
+		PRINT_DEBUG("Done\r\n");
 }