summaryrefslogtreecommitdiff
path: root/src/southbridge/via/vt8237r
diff options
context:
space:
mode:
authorStefan Reinauer <stepan@coresystems.de>2010-03-22 11:42:32 +0000
committerStefan Reinauer <stepan@openbios.org>2010-03-22 11:42:32 +0000
commitc02b4fc9db3c3c1e263027382697b566127f66bb (patch)
tree11bd18488e360e5c1beeb9ccb852ef4489c3689a /src/southbridge/via/vt8237r
parent27852aba6787617ca5656995cbc7e8ef0a3ea22c (diff)
downloadcoreboot-c02b4fc9db3c3c1e263027382697b566127f66bb.tar.xz
printk_foo -> printk(BIOS_FOO, ...)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5266 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/via/vt8237r')
-rw-r--r--src/southbridge/via/vt8237r/vt8237r.c8
-rw-r--r--src/southbridge/via/vt8237r/vt8237r_ide.c8
-rw-r--r--src/southbridge/via/vt8237r/vt8237r_lpc.c8
-rw-r--r--src/southbridge/via/vt8237r/vt8237r_sata.c2
-rw-r--r--src/southbridge/via/vt8237r/vt8237r_usb.c10
5 files changed, 18 insertions, 18 deletions
diff --git a/src/southbridge/via/vt8237r/vt8237r.c b/src/southbridge/via/vt8237r/vt8237r.c
index 8be26db608..2b5d34bccc 100644
--- a/src/southbridge/via/vt8237r/vt8237r.c
+++ b/src/southbridge/via/vt8237r/vt8237r.c
@@ -30,7 +30,7 @@
void hard_reset(void)
{
- printk_err("NO HARD RESET ON VT8237R! FIX ME!\n");
+ printk(BIOS_ERR, "NO HARD RESET ON VT8237R! FIX ME!\n");
}
#if CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 7
@@ -61,10 +61,10 @@ void dump_south(device_t dev)
int i, j;
for (i = 0; i < 256; i += 16) {
- printk_debug("%02x: ", i);
+ printk(BIOS_DEBUG, "%02x: ", i);
for (j = 0; j < 16; j++)
- printk_debug("%02x ", pci_read_config8(dev, i + j));
- printk_debug("\n");
+ printk(BIOS_DEBUG, "%02x ", pci_read_config8(dev, i + j));
+ printk(BIOS_DEBUG, "\n");
}
}
diff --git a/src/southbridge/via/vt8237r/vt8237r_ide.c b/src/southbridge/via/vt8237r/vt8237r_ide.c
index 86a87ac791..0b4dccc2f0 100644
--- a/src/southbridge/via/vt8237r/vt8237r_ide.c
+++ b/src/southbridge/via/vt8237r/vt8237r_ide.c
@@ -40,15 +40,15 @@ static void ide_init(struct device *dev)
device_t lpc_dev;
int i, j;
- printk_info("%s IDE interface %s\n", "Primary",
+ printk(BIOS_INFO, "%s IDE interface %s\n", "Primary",
sb->ide0_enable ? "enabled" : "disabled");
- printk_info("%s IDE interface %s\n", "Secondary",
+ printk(BIOS_INFO, "%s IDE interface %s\n", "Secondary",
sb->ide1_enable ? "enabled" : "disabled");
enables = pci_read_config8(dev, IDE_CS) & ~0x3;
enables |= (sb->ide0_enable << 1) | sb->ide1_enable;
pci_write_config8(dev, IDE_CS, enables);
enables = pci_read_config8(dev, IDE_CS);
- printk_debug("Enables in reg 0x40 read back as 0x%x\n", enables);
+ printk(BIOS_DEBUG, "Enables in reg 0x40 read back as 0x%x\n", enables);
/* Enable only compatibility mode. */
enables = pci_read_config8(dev, 0x09);
@@ -59,7 +59,7 @@ static void ide_init(struct device *dev)
enables &= ~0xc0;
pci_write_config8(dev, IDE_CONF_II, enables);
enables = pci_read_config8(dev, IDE_CONF_II);
- printk_debug("Enables in reg 0x42 read back as 0x%x\n", enables);
+ printk(BIOS_DEBUG, "Enables in reg 0x42 read back as 0x%x\n", enables);
/* Enable prefetch buffers. */
enables = pci_read_config8(dev, IDE_CONF_I);
diff --git a/src/southbridge/via/vt8237r/vt8237r_lpc.c b/src/southbridge/via/vt8237r/vt8237r_lpc.c
index d53028128f..4e09823a69 100644
--- a/src/southbridge/via/vt8237r/vt8237r_lpc.c
+++ b/src/southbridge/via/vt8237r/vt8237r_lpc.c
@@ -238,7 +238,7 @@ static void setup_pm(device_t dev)
tmp = inw(VT8237R_ACPI_IO_BASE + 0x04);
#if CONFIG_HAVE_ACPI_RESUME == 1
acpi_slp_type = ((tmp & (7 << 10)) >> 10) == 1 ? 3 : 0 ;
- printk_debug("SLP_TYP type was %x %x\n", tmp, acpi_slp_type);
+ printk(BIOS_DEBUG, "SLP_TYP type was %x %x\n", tmp, acpi_slp_type);
#endif
/* clear sleep */
tmp &= ~(7 << 10);
@@ -251,7 +251,7 @@ static void vt8237r_init(struct device *dev)
u8 enables, reg8;
#if CONFIG_EPIA_VT8237R_INIT
- printk_spew("Entering vt8237r_init, for EPIA.\n");
+ printk(BIOS_SPEW, "Entering vt8237r_init, for EPIA.\n");
/*
* TODO: Looks like stock BIOS can do this but causes a hang
* Enable SATA LED, disable special CPU Frequency Change -
@@ -277,7 +277,7 @@ static void vt8237r_init(struct device *dev)
pci_write_config8(dev, 0x4E, enables);
#else
- printk_spew("Entering vt8237r_init.\n");
+ printk(BIOS_SPEW, "Entering vt8237r_init.\n");
/*
* Enable SATA LED, disable special CPU Frequency Change -
* GPIO28 GPIO22 GPIO29 GPIO23 are GPIOs.
@@ -318,7 +318,7 @@ static void vt8237r_init(struct device *dev)
outb(0x1, VT8237R_ACPI_IO_BASE + 0x11);
#endif
- printk_spew("Leaving %s.\n", __func__);
+ printk(BIOS_SPEW, "Leaving %s.\n", __func__);
}
static void vt8237s_init(struct device *dev)
diff --git a/src/southbridge/via/vt8237r/vt8237r_sata.c b/src/southbridge/via/vt8237r/vt8237r_sata.c
index b0c58aa9c1..8d09057f27 100644
--- a/src/southbridge/via/vt8237r/vt8237r_sata.c
+++ b/src/southbridge/via/vt8237r/vt8237r_sata.c
@@ -28,7 +28,7 @@ static void sata_i_init(struct device *dev)
{
u8 reg;
- printk_debug("Configuring VIA SATA controller\n");
+ printk(BIOS_DEBUG, "Configuring VIA SATA controller\n");
/* Class IDE Disk */
reg = pci_read_config8(dev, SATA_MISC_CTRL);
diff --git a/src/southbridge/via/vt8237r/vt8237r_usb.c b/src/southbridge/via/vt8237r/vt8237r_usb.c
index 2c554ca3da..4bd33d6346 100644
--- a/src/southbridge/via/vt8237r/vt8237r_usb.c
+++ b/src/southbridge/via/vt8237r/vt8237r_usb.c
@@ -34,16 +34,16 @@ static void usb_i_init(struct device *dev)
#if CONFIG_EPIA_VT8237R_INIT
u8 reg8;
- printk_debug("Entering %s\n", __func__);
+ printk(BIOS_DEBUG, "Entering %s\n", __func__);
- printk_spew("%s Read %02X from PCI Command Reg\n", dev_path(dev), reg8);
+ printk(BIOS_SPEW, "%s Read %02X from PCI Command Reg\n", dev_path(dev), reg8);
reg8 = pci_read_config8(dev, 0x04);
reg8 = reg8 | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
pci_write_config8(dev, 0x04, reg8);
- printk_spew("%s Wrote %02X to PCI Command Reg\n", dev_path(dev), reg8);
+ printk(BIOS_SPEW, "%s Wrote %02X to PCI Command Reg\n", dev_path(dev), reg8);
/* Set Cache Line Size and Latency Timer */
pci_write_config8(dev, 0x0c, 0x08);
@@ -74,7 +74,7 @@ static void vt8237_usb_i_read_resources(struct device *dev)
struct resource *res;
u8 function = (u8) dev->path.pci.devfn & 0x7;
- printk_spew("VT8237R Fixing USB 1.1 fn %d I/O resource = 0x%04X\n", function, usb_io_addr[function]);
+ printk(BIOS_SPEW, "VT8237R Fixing USB 1.1 fn %d I/O resource = 0x%04X\n", function, usb_io_addr[function]);
/* Fix the I/O Resources of the USB1.1 Interfaces */
/* Auto PCI probe seems to size the resources */
@@ -98,7 +98,7 @@ static void usb_ii_init(struct device *dev)
#if CONFIG_EPIA_VT8237R_INIT
u8 reg8;
- printk_debug("Entering %s\n", __func__);
+ printk(BIOS_DEBUG, "Entering %s\n", __func__);
/* Set memory Write and Invalidate */
reg8 = pci_read_config8(dev, 0x04);