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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-07-07 23:54:15 +1000
committerEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-07-08 13:53:21 +0200
commit264d265d9c0f9f6c157fcc12d28b238849d25293 (patch)
tree126f0c4f4d01f92e66ecb4c296d5035d09d57f74 /src/southbridge/via/vt82c686
parent730e3b02fb30b944664f69d9a73e69256bc9952f (diff)
downloadcoreboot-264d265d9c0f9f6c157fcc12d28b238849d25293.tar.xz
southbridge: Trivial - drop trailing blank lines at EOF
Change-Id: I5484ebb665453777cc3b2561be6e50c787f1a257 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6209 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge/via/vt82c686')
-rw-r--r--src/southbridge/via/vt82c686/early_serial.c1
-rw-r--r--src/southbridge/via/vt82c686/vt82c686.h1
2 files changed, 0 insertions, 2 deletions
diff --git a/src/southbridge/via/vt82c686/early_serial.c b/src/southbridge/via/vt82c686/early_serial.c
index 70b6b545fc..55742a75ef 100644
--- a/src/southbridge/via/vt82c686/early_serial.c
+++ b/src/southbridge/via/vt82c686/early_serial.c
@@ -89,4 +89,3 @@ static void vt82c686_enable_serial(device_t dev, unsigned iobase)
reg = pci_read_config8(sbdev, 0x85);
pci_write_config8(sbdev, 0x85, reg & 0xfd); /* Clear bit 1. */
}
-
diff --git a/src/southbridge/via/vt82c686/vt82c686.h b/src/southbridge/via/vt82c686/vt82c686.h
index b0642f723e..7d2ac5274a 100644
--- a/src/southbridge/via/vt82c686/vt82c686.h
+++ b/src/southbridge/via/vt82c686/vt82c686.h
@@ -53,4 +53,3 @@ PCI_DEVICE_ID_VIA_82C686_4 0x3057 // Function 4, Power Management
PCI_DEVICE_ID_VIA_82C686_5 0x3058 // Function 5, AC'97 Codec
PCI_DEVICE_ID_VIA_82C686_6 0x3068 // Function 6, MC'97 Codec
*/
-