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authorFlorian Zumbiehl <florz@florz.de>2011-11-01 20:18:29 +0100
committerRudolf Marek <r.marek@assembler.cz>2011-11-23 01:05:40 +0100
commitfa48b969086216341f77738df4b912859010fcf6 (patch)
tree6464539fe33c88143e8e2339975949a0111b2402 /src/southbridge/via
parent85392a8c985b11388efb4a07ef1b1481d9a511e2 (diff)
downloadcoreboot-fa48b969086216341f77738df4b912859010fcf6.tar.xz
k8 raminit: fix bug, improve clock selection, add clock limit for sock754
in amdk8 raminit: - fix DDR SPD offset for (CLX - 1) (25 instead of 26) - improve clock/CL selection algorithm - implement load-dependent clock limiting for socket 754 Change-Id: I5eb8a3e02eaca18f3bef9a98de22f23b23650762 Signed-off-by: Florian Zumbiehl <florz@florz.de> Reviewed-on: http://review.coreboot.org/377 Tested-by: build bot (Jenkins) Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
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