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authorEric Biederman <ebiederm@xmission.com>2004-10-21 10:44:08 +0000
committerEric Biederman <ebiederm@xmission.com>2004-10-21 10:44:08 +0000
commitdbec2d4090e40d1d8e1fd06e8d4180d3fa685d4d (patch)
treee813d3f9dea80d35cbc29d6bf35995fec0a06ab9 /src/southbridge/via
parentf3aa4707d3bef9f529a70a204dbc648968cf7c20 (diff)
downloadcoreboot-dbec2d4090e40d1d8e1fd06e8d4180d3fa685d4d.tar.xz
- Bump the LinuxBIOS major version
- Rename chip_config chip_operations throughout the tree - Fix Config.lb on most of the Opteron Ports - Fix the amd 8000 chipset support for setting the subsystem vendor and device ids - Add detection of devices that are on the motherboard (i.e. In Config.lb) - Baby step in getting the resource limit handling correct, Ignore fixed resources - Only call enable_childrens_resources on devices we know will have children For some busses like i2c it is non-sense and we don't want it. - Set the resource limits for pnp devices resources. - Improve the resource size detection for pnp devices. - Added a configuration register to amd8111_ide.c so we can enable/disable individual ide channels - Added a header file to hold the prototype of isa_dma_init - Fixed most of the superio chips so the should work now, the via superio pci device is the exception. - The code compiles and runs so it is time for me to go to bed. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1698 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/via')
-rw-r--r--src/southbridge/via/vt8231/chip.h2
-rw-r--r--src/southbridge/via/vt8231/vt8231.c10
-rw-r--r--src/southbridge/via/vt8235/chip.h2
-rw-r--r--src/southbridge/via/vt8235/vt8235.c10
4 files changed, 4 insertions, 20 deletions
diff --git a/src/southbridge/via/vt8231/chip.h b/src/southbridge/via/vt8231/chip.h
index fe3d332675..28c3b2ef74 100644
--- a/src/southbridge/via/vt8231/chip.h
+++ b/src/southbridge/via/vt8231/chip.h
@@ -1,7 +1,7 @@
#ifndef _SOUTHBRIDGE_VIA_VT8231
#define _SOUTHBRIDGE_VIA_VT8231
-extern struct chip_control southbridge_via_vt8231_control;
+extern struct chip_operations southbridge_via_vt8231_control;
struct southbridge_via_vt8231_config {
/* PCI function enables */
diff --git a/src/southbridge/via/vt8231/vt8231.c b/src/southbridge/via/vt8231/vt8231.c
index 99fef4c0cc..27d635d38f 100644
--- a/src/southbridge/via/vt8231/vt8231.c
+++ b/src/southbridge/via/vt8231/vt8231.c
@@ -449,15 +449,7 @@ static void southbridge_init(struct chip *chip, enum chip_pass pass)
}
}
-static void enumerate(struct chip *chip)
-{
- extern struct device_operations default_pci_ops_bus;
- chip_enumerate(chip);
- chip->dev->ops = &default_pci_ops_bus;
-}
-
-struct chip_control southbridge_via_vt8231_control = {
- .enumerate = enumerate,
+struct chip_operations southbridge_via_vt8231_control = {
.enable = southbridge_init,
.name = "VIA vt8231"
};
diff --git a/src/southbridge/via/vt8235/chip.h b/src/southbridge/via/vt8235/chip.h
index 897ba13bf6..b855a9423c 100644
--- a/src/southbridge/via/vt8235/chip.h
+++ b/src/southbridge/via/vt8235/chip.h
@@ -1,7 +1,7 @@
#ifndef _SOUTHBRIDGE_VIA_VT8235
#define _SOUTHBRIDGE_VIA_VT8235
-extern struct chip_control southbridge_via_vt8235_control;
+extern struct chip_operations southbridge_via_vt8235_control;
struct southbridge_via_vt8235_config {
/* PCI function enables */
diff --git a/src/southbridge/via/vt8235/vt8235.c b/src/southbridge/via/vt8235/vt8235.c
index a8dc4bae6e..29d32df8fa 100644
--- a/src/southbridge/via/vt8235/vt8235.c
+++ b/src/southbridge/via/vt8235/vt8235.c
@@ -557,15 +557,7 @@ static void southbridge_init(struct chip *chip, enum chip_pass pass)
}
}
-static void enumerate(struct chip *chip)
-{
- extern struct device_operations default_pci_ops_bus;
- chip_enumerate(chip);
- chip->dev->ops = &default_pci_ops_bus;
-}
-
-struct chip_control southbridge_via_vt8235_control = {
- .enumerate = enumerate,
+struct chip_operations southbridge_via_vt8235_control = {
.enable = southbridge_init,
.name = "VIA vt8235"
};