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authorBari Ari <bari@onelabs.com>2008-06-20 00:01:14 +0000
committerPeter Stuge <peter@stuge.se>2008-06-20 00:01:14 +0000
commit4e48408059cb07cf1fbf8f74e61cc9dc7b7cd0bf (patch)
treec34f3986790c1785bca14d9b92ccd320f2d1e42b /src/southbridge/via
parent42b127fe2244a037a30c5e0f5c686d4ebb70d62f (diff)
downloadcoreboot-4e48408059cb07cf1fbf8f74e61cc9dc7b7cd0bf.tar.xz
Extend the VIA vt8237r southbridge decode range for the ROM to 1MB.
Signed-off-by: Bari Ari <bari@onelabs.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3369 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/via')
-rw-r--r--src/southbridge/via/vt8237r/vt8237r.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/southbridge/via/vt8237r/vt8237r.c b/src/southbridge/via/vt8237r/vt8237r.c
index a72b9a1c06..9b85f2fc32 100644
--- a/src/southbridge/via/vt8237r/vt8237r.c
+++ b/src/southbridge/via/vt8237r/vt8237r.c
@@ -79,6 +79,8 @@ static void vt8237r_enable(struct device *dev)
pci_write_config8(dev, 0x51, sb->fn_ctrl_hi);
/* TODO: If SATA is disabled, move IDE to fn0 to conform PCI specs. */
+ /* Extend ROM decode to 1MB FFC00000 - FFFFFFFF */
+ pci_write_config8(dev, 0x41, 0x7f);
}
struct chip_operations southbridge_via_vt8237r_ops = {