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authorGreg Watson <jarrah@users.sourceforge.net>2004-04-17 02:36:47 +0000
committerGreg Watson <jarrah@users.sourceforge.net>2004-04-17 02:36:47 +0000
commit8e0586200b61cd5bf4a3f59bf7ac68efc6f9ac17 (patch)
tree68ff45027fa056dfdf52556c3c2469c6e29e6132 /src/southbridge/via
parent550999eaca74ba5bd5663c584bc04239def15fc1 (diff)
downloadcoreboot-8e0586200b61cd5bf4a3f59bf7ac68efc6f9ac17.tar.xz
start of epia-m port
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1512 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/via')
-rw-r--r--src/southbridge/via/vt8235/Config.lb2
-rw-r--r--src/southbridge/via/vt8235/chip.h21
2 files changed, 23 insertions, 0 deletions
diff --git a/src/southbridge/via/vt8235/Config.lb b/src/southbridge/via/vt8235/Config.lb
new file mode 100644
index 0000000000..b0b2ef5abf
--- /dev/null
+++ b/src/southbridge/via/vt8235/Config.lb
@@ -0,0 +1,2 @@
+config chip.h
+object vt8231.o
diff --git a/src/southbridge/via/vt8235/chip.h b/src/southbridge/via/vt8235/chip.h
new file mode 100644
index 0000000000..fe3d332675
--- /dev/null
+++ b/src/southbridge/via/vt8235/chip.h
@@ -0,0 +1,21 @@
+#ifndef _SOUTHBRIDGE_VIA_VT8231
+#define _SOUTHBRIDGE_VIA_VT8231
+
+extern struct chip_control southbridge_via_vt8231_control;
+
+struct southbridge_via_vt8231_config {
+ /* PCI function enables */
+ /* i.e. so that pci scan bus will find them. */
+ /* I am putting in IDE as an example but obviously this needs
+ * to be more complete!
+ */
+ int enable_ide;
+ /* enables of functions of devices */
+ int enable_usb;
+ int enable_native_ide;
+ int enable_com_ports;
+ int enable_keyboard;
+ int enable_nvram;
+};
+
+#endif /* _SOUTHBRIDGE_VIA_VT8231 */