diff options
| author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-11-26 22:42:41 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-11-26 22:42:41 +0000 |
| commit | 39124dd6c5f577861c16b947088ac1fd31169b8f (patch) | |
| tree | b2b82e8557f45fddb5fa654703e2bd6876ff4b2f /src/southbridge | |
| parent | e89d8a57accbac5066f80266d1e98e63f62ba4c5 (diff) | |
| download | coreboot-39124dd6c5f577861c16b947088ac1fd31169b8f.tar.xz | |
Broadcom BCM5785: Add TINY_BOOTBLOCK support.
In bcm5785_enable_rom(): Use PCI IDs from pci_ids.h instead of hardcoding,
and use 'dev' instead of 'addr' as device_t variable name.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6126 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/broadcom/bcm5785/Kconfig | 1 | ||||
| -rw-r--r-- | src/southbridge/broadcom/bcm5785/bcm5785_enable_rom.c | 21 | ||||
| -rw-r--r-- | src/southbridge/broadcom/bcm5785/bootblock.c | 5 |
3 files changed, 17 insertions, 10 deletions
diff --git a/src/southbridge/broadcom/bcm5785/Kconfig b/src/southbridge/broadcom/bcm5785/Kconfig index d72afd8d2c..dae9a63f2c 100644 --- a/src/southbridge/broadcom/bcm5785/Kconfig +++ b/src/southbridge/broadcom/bcm5785/Kconfig @@ -1,6 +1,7 @@ config SOUTHBRIDGE_BROADCOM_BCM5785 bool select HAVE_HARD_RESET + select TINY_BOOTBLOCK config BOOTBLOCK_SOUTHBRIDGE_INIT string diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_enable_rom.c b/src/southbridge/broadcom/bcm5785/bcm5785_enable_rom.c index c5385ae257..1cd28498b9 100644 --- a/src/southbridge/broadcom/bcm5785/bcm5785_enable_rom.c +++ b/src/southbridge/broadcom/bcm5785/bcm5785_enable_rom.c @@ -18,17 +18,22 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include <stdint.h> +#include <arch/io.h> +#include <arch/romcc_io.h> +#include <device/pci_ids.h> + +/* Enable 4MB ROM access at 0xFFC00000 - 0xFFFFFFFF. */ static void bcm5785_enable_rom(void) { - unsigned char byte; - device_t addr; + u8 byte; + device_t dev; - /* Enable 4MB rom access at 0xFFC00000 - 0xFFFFFFFF */ - /* Locate the BCM 5785 SB PCI Main */ - addr = pci_locate_device(PCI_ID(0x1166, 0x0205), 0); // 0x0201? + dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_SERVERWORKS, + PCI_DEVICE_ID_SERVERWORKS_BCM5785_SB_PCI_MAIN), 0); - /* Set the 4MB enable bit bit */ - byte = pci_read_config8(addr, 0x41); + /* Set the 4MB enable bits. */ + byte = pci_read_config8(dev, 0x41); byte |= 0x0e; - pci_write_config8(addr, 0x41, byte); + pci_write_config8(dev, 0x41, byte); } diff --git a/src/southbridge/broadcom/bcm5785/bootblock.c b/src/southbridge/broadcom/bcm5785/bootblock.c index 77bf231f5d..40201c6072 100644 --- a/src/southbridge/broadcom/bcm5785/bootblock.c +++ b/src/southbridge/broadcom/bcm5785/bootblock.c @@ -20,6 +20,7 @@ #include "bcm5785_enable_rom.c" -static void bootblock_southbridge_init(void) { - bcm5785_enable_rom(); +static void bootblock_southbridge_init(void) +{ + bcm5785_enable_rom(); } |