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authorLi-Ta Lo <ollie@lanl.gov>2004-12-03 22:39:34 +0000
committerLi-Ta Lo <ollie@lanl.gov>2004-12-03 22:39:34 +0000
commit3a81285409cf09091b1704d126a38a5126030d2b (patch)
tree86ca8ef1150cc4118f0ed5619083dbd07fc125b5 /src/southbridge
parent845e8df6738495d11922148d649a666faf374aa0 (diff)
downloadcoreboot-3a81285409cf09091b1704d126a38a5126030d2b.tar.xz
allocating resource for legacy VGA frame buffer, it is not 100%
correct but it works anyway. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1811 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/amd8111/amd8111_lpc.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/southbridge/amd/amd8111/amd8111_lpc.c b/src/southbridge/amd/amd8111/amd8111_lpc.c
index 5d3fc44a1b..65c1ccb013 100644
--- a/src/southbridge/amd/amd8111/amd8111_lpc.c
+++ b/src/southbridge/amd/amd8111/amd8111_lpc.c
@@ -84,7 +84,7 @@ static void setup_ioapic(void)
return;
}
printk_spew("for IRQ, reg 0x%08x value 0x%08x 0x%08x\n",
- a->reg, a->value_low, a->value_high);
+ a->reg, a->value_low, a->value_high);
}
}
@@ -176,15 +176,16 @@ static void amd8111_lpc_enable_resources(device_t dev)
enable_childrens_resources(dev);
}
-
static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
{
pci_write_config32(dev, 0x70,
- ((device & 0xffff) << 16) | (vendor & 0xffff));
+ ((device & 0xffff) << 16) | (vendor & 0xffff));
}
+
static struct pci_operations lops_pci = {
.set_subsystem = lpci_set_subsystem,
};
+
static struct device_operations lpc_ops = {
.read_resources = amd8111_lpc_read_resources,
.set_resources = pci_dev_set_resources,