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authorMyles Watson <mylesgw@gmail.com>2009-09-29 14:56:15 +0000
committerMyles Watson <mylesgw@gmail.com>2009-09-29 14:56:15 +0000
commit6e2357676fb9ccf202ac3dbc66c83a040f061a4e (patch)
tree3cb788b3a5c6866737ea33894ce35ebb4dd80deb /src/southbridge
parent5e54871375a3416c576d1d1fbdfddda2dbcc7411 (diff)
downloadcoreboot-6e2357676fb9ccf202ac3dbc66c83a040f061a4e.tar.xz
Remove some warnings.
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4686 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/amd8111/amd8111_lpc.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/amd/amd8111/amd8111_lpc.c b/src/southbridge/amd/amd8111/amd8111_lpc.c
index c239f7e7cf..94ef1a44cc 100644
--- a/src/southbridge/amd/amd8111/amd8111_lpc.c
+++ b/src/southbridge/amd/amd8111/amd8111_lpc.c
@@ -76,7 +76,7 @@ static void setup_ioapic(void)
l = (unsigned long *) ioapic_base;
ioapicregvalues[0].value_high = bsp_apicid<<(56-32);
- printk_debug("amd8111: ioapic bsp_apicid = %02x\n", bsp_apicid);
+ printk_debug("amd8111: ioapic bsp_apicid = %02lx\n", bsp_apicid);
for (i = 0; i < ARRAY_SIZE(ioapicregvalues);
i++, a++) {
@@ -101,7 +101,7 @@ static void enable_hpet(struct device *dev)
pci_write_config32(dev,0xa0, 0xfed00001);
hpet_address = pci_read_config32(dev,0xa0)& 0xfffffffe;
- printk_debug("enabling HPET @0x%x\n", hpet_address);
+ printk_debug("enabling HPET @0x%lx\n", hpet_address);
}