acpi: Move ACPI table support out of arch/x86 (3/5)

This change moves all ACPI table support in coreboot currently living
under arch/x86 into common code to make it architecture
independent. ACPI table generation is not really tied to any
architecture and hence it makes sense to move this to its own
directory.

In order to make it easier to review, this change is being split into
multiple CLs. This is change 3/5 which basically is generated by
running the following command:
$ git grep -iIl "arch/acpi" | xargs sed -i 's/arch\/acpi/acpi\/acpi/g'

BUG=b:155428745

Change-Id: I16b1c45d954d6440fb9db1d3710063a47b582eae
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40938
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>

40 files changed, 50 insertions, 50 deletions

diff --git a/src/southbridge/amd/agesa/hudson/fadt.c b/src/southbridge/amd/agesa/hudson/fadt.c
index 0baaa9c5c8..be724434cb 100644
--- a/src/southbridge/amd/agesa/hudson/fadt.c
+++ b/src/southbridge/amd/agesa/hudson/fadt.c
@@ -7,7 +7,7 @@
 
 #include <string.h>
 #include <console/console.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <device/device.h>
 #include <version.h>
 
diff --git a/src/southbridge/amd/agesa/hudson/lpc.c b/src/southbridge/amd/agesa/hudson/lpc.c
index 0b579842a6..56879a3418 100644
--- a/src/southbridge/amd/agesa/hudson/lpc.c
+++ b/src/southbridge/amd/agesa/hudson/lpc.c
@@ -13,7 +13,7 @@
 #include <pc80/isa-dma.h>
 #include <arch/io.h>
 #include <arch/ioapic.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <pc80/i8254.h>
 #include <pc80/i8259.h>
 #include "hudson.h"
diff --git a/src/southbridge/amd/agesa/hudson/ramtop.c b/src/southbridge/amd/agesa/hudson/ramtop.c
index 46ce0cf07b..eeb37809fc 100644
--- a/src/southbridge/amd/agesa/hudson/ramtop.c
+++ b/src/southbridge/amd/agesa/hudson/ramtop.c
@@ -3,7 +3,7 @@
 
 #include <stdint.h>
 #include <arch/io.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include "hudson.h"
 
 int acpi_get_sleep_type(void)
diff --git a/src/southbridge/amd/cimx/sb800/cfg.c b/src/southbridge/amd/cimx/sb800/cfg.c
index cf7f3f5fa5..256a9c5b7b 100644
--- a/src/southbridge/amd/cimx/sb800/cfg.c
+++ b/src/southbridge/amd/cimx/sb800/cfg.c
@@ -5,7 +5,7 @@
 #include "cfg.h"
 #include <OEM.h>
 
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 
 /**
  * @brief South Bridge CIMx configuration
diff --git a/src/southbridge/amd/cimx/sb800/fadt.c b/src/southbridge/amd/cimx/sb800/fadt.c
index 5cb1695c85..67de34829c 100644
--- a/src/southbridge/amd/cimx/sb800/fadt.c
+++ b/src/southbridge/amd/cimx/sb800/fadt.c
@@ -9,7 +9,7 @@
 
 #include <string.h>
 #include <console/console.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <arch/io.h>
 #include <device/device.h>
 #include <version.h>
diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c
index e4a1795ab4..b0ee037ae2 100644
--- a/src/southbridge/amd/cimx/sb800/late.c
+++ b/src/southbridge/amd/cimx/sb800/late.c
@@ -14,7 +14,7 @@
 #include <pc80/i8254.h>
 #include <pc80/i8259.h>
 #include <console/console.h>	/* printk */
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <device/pci_ehci.h>
 #include "lpc.h"		/* lpc_read_resources */
 #include "SBPLATFORM.h"		/* Platform Specific Definitions */
diff --git a/src/southbridge/amd/cimx/sb800/ramtop.c b/src/southbridge/amd/cimx/sb800/ramtop.c
index 25259eeacf..d25f391b13 100644
--- a/src/southbridge/amd/cimx/sb800/ramtop.c
+++ b/src/southbridge/amd/cimx/sb800/ramtop.c
@@ -3,7 +3,7 @@
 
 #include <stdint.h>
 #include <arch/io.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <cbmem.h>
 #include "SBPLATFORM.h"
 
diff --git a/src/southbridge/amd/pi/hudson/fadt.c b/src/southbridge/amd/pi/hudson/fadt.c
index 15fd6bb0c9..23239dd213 100644
--- a/src/southbridge/amd/pi/hudson/fadt.c
+++ b/src/southbridge/amd/pi/hudson/fadt.c
@@ -7,7 +7,7 @@
 
 #include <string.h>
 #include <console/console.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <device/device.h>
 #include <version.h>
 
diff --git a/src/southbridge/amd/pi/hudson/hudson.c b/src/southbridge/amd/pi/hudson/hudson.c
index 3a6b541733..00c8900550 100644
--- a/src/southbridge/amd/pi/hudson/hudson.c
+++ b/src/southbridge/amd/pi/hudson/hudson.c
@@ -5,7 +5,7 @@
 #include <console/console.h>
 #include <arch/io.h>
 #include <device/mmio.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_def.h>
diff --git a/src/southbridge/amd/pi/hudson/lpc.c b/src/southbridge/amd/pi/hudson/lpc.c
index c50758256b..c8f37a470a 100644
--- a/src/southbridge/amd/pi/hudson/lpc.c
+++ b/src/southbridge/amd/pi/hudson/lpc.c
@@ -13,7 +13,7 @@
 #include <pc80/isa-dma.h>
 #include <arch/io.h>
 #include <arch/ioapic.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <pc80/i8254.h>
 #include <pc80/i8259.h>
 #include <types.h>
diff --git a/src/southbridge/intel/bd82x6x/elog.c b/src/southbridge/intel/bd82x6x/elog.c
index dc5da793a3..241c1a0d83 100644
--- a/src/southbridge/intel/bd82x6x/elog.c
+++ b/src/southbridge/intel/bd82x6x/elog.c
@@ -2,7 +2,7 @@
 /* This file is part of the coreboot project. */
 
 #include <arch/io.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ops.h>
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index 35d71a4d07..1100544707 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -12,8 +12,8 @@
 #include <pc80/i8259.h>
 #include <arch/io.h>
 #include <arch/ioapic.h>
-#include <arch/acpi.h>
-#include <arch/acpigen.h>
+#include <acpi/acpi.h>
+#include <acpi/acpigen.h>
 #include <cpu/x86/smm.h>
 #include <cbmem.h>
 #include <string.h>
diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c
index b1f3bfe861..ae62638f1b 100644
--- a/src/southbridge/intel/bd82x6x/me.c
+++ b/src/southbridge/intel/bd82x6x/me.c
@@ -9,7 +9,7 @@
  * not used unless the console loglevel is high enough.
  */
 
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <device/mmio.h>
 #include <device/pci_ops.h>
 #include <console/console.h>
diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c
index 054c29f565..d240bf65d5 100644
--- a/src/southbridge/intel/bd82x6x/me_8.x.c
+++ b/src/southbridge/intel/bd82x6x/me_8.x.c
@@ -9,7 +9,7 @@
  * not used unless the console loglevel is high enough.
  */
 
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <device/mmio.h>
 #include <device/device.h>
 #include <device/pci.h>
diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h
index 0a236c6b7e..a452263645 100644
--- a/src/southbridge/intel/bd82x6x/pch.h
+++ b/src/southbridge/intel/bd82x6x/pch.h
@@ -4,7 +4,7 @@
 #ifndef SOUTHBRIDGE_INTEL_BD82X6X_PCH_H
 #define SOUTHBRIDGE_INTEL_BD82X6X_PCH_H
 
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 
 /* PCH types */
 #define PCH_TYPE_CPT	0x1c /* CougarPoint */
diff --git a/src/southbridge/intel/common/acpi_pirq_gen.c b/src/southbridge/intel/common/acpi_pirq_gen.c
index 20dafdfd38..d1a00f4498 100644
--- a/src/southbridge/intel/common/acpi_pirq_gen.c
+++ b/src/southbridge/intel/common/acpi_pirq_gen.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /* This file is part of the coreboot project. */
 
-#include <arch/acpigen.h>
+#include <acpi/acpigen.h>
 #include <console/console.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
diff --git a/src/southbridge/intel/common/madt.c b/src/southbridge/intel/common/madt.c
index d425a74366..fe65afaea2 100644
--- a/src/southbridge/intel/common/madt.c
+++ b/src/southbridge/intel/common/madt.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /* This file is part of the coreboot project. */
 
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <arch/ioapic.h>
 #include <arch/smp/mpspec.h>
 
diff --git a/src/southbridge/intel/common/pciehp.c b/src/southbridge/intel/common/pciehp.c
index e5bbdab2fb..4f77bb0086 100644
--- a/src/southbridge/intel/common/pciehp.c
+++ b/src/southbridge/intel/common/pciehp.c
@@ -2,8 +2,8 @@
 /* This file is part of the coreboot project. */
 
 #include <string.h>
-#include <arch/acpi.h>
-#include <arch/acpigen.h>
+#include <acpi/acpi.h>
+#include <acpi/acpigen.h>
 #include <device/device.h>
 #include <device/pci.h>
 
diff --git a/src/southbridge/intel/common/pmbase.c b/src/southbridge/intel/common/pmbase.c
index 6175302d54..d78e9cd2e8 100644
--- a/src/southbridge/intel/common/pmbase.c
+++ b/src/southbridge/intel/common/pmbase.c
@@ -2,7 +2,7 @@
 /* This file is part of the coreboot project. */
 
 #include <stdint.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <arch/io.h>
 #include <bootmode.h>
 #include <device/pci_ops.h>
diff --git a/src/southbridge/intel/common/pmclib.c b/src/southbridge/intel/common/pmclib.c
index d44d6195ce..72df0ff86a 100644
--- a/src/southbridge/intel/common/pmclib.c
+++ b/src/southbridge/intel/common/pmclib.c
@@ -2,7 +2,7 @@
 /* This file is part of the coreboot project. */
 
 #include <stdint.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <console/console.h>
 
 #include "pmclib.h"
diff --git a/src/southbridge/intel/common/smihandler.c b/src/southbridge/intel/common/smihandler.c
index 7b27ce0cd5..3e3dca94f8 100644
--- a/src/southbridge/intel/common/smihandler.c
+++ b/src/southbridge/intel/common/smihandler.c
@@ -4,7 +4,7 @@
 #include <types.h>
 #include <arch/io.h>
 #include <device/pci_ops.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <console/console.h>
 #include <cpu/x86/cache.h>
 #include <device/pci_def.h>
diff --git a/src/southbridge/intel/i82371eb/acpi_tables.c b/src/southbridge/intel/i82371eb/acpi_tables.c
index 96fcefcebb..4b29e0fe4d 100644
--- a/src/southbridge/intel/i82371eb/acpi_tables.c
+++ b/src/southbridge/intel/i82371eb/acpi_tables.c
@@ -2,8 +2,8 @@
 /* This file is part of the coreboot project. */
 
 #include <console/console.h>
-#include <arch/acpi.h>
-#include <arch/acpigen.h>
+#include <acpi/acpi.h>
+#include <acpi/acpigen.h>
 #include <arch/smp/mpspec.h>
 #include <device/device.h>
 #include "i82371eb.h"
diff --git a/src/southbridge/intel/i82371eb/fadt.c b/src/southbridge/intel/i82371eb/fadt.c
index db1071a041..03bbdccb76 100644
--- a/src/southbridge/intel/i82371eb/fadt.c
+++ b/src/southbridge/intel/i82371eb/fadt.c
@@ -16,7 +16,7 @@
  */
 
 #include <string.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <version.h>
diff --git a/src/southbridge/intel/i82371eb/isa.c b/src/southbridge/intel/i82371eb/isa.c
index bc492df15a..d1918657c8 100644
--- a/src/southbridge/intel/i82371eb/isa.c
+++ b/src/southbridge/intel/i82371eb/isa.c
@@ -23,8 +23,8 @@
 #include <pc80/mc146818rtc.h>
 #include <arch/ioapic.h>
 #if CONFIG(HAVE_ACPI_TABLES)
-#include <arch/acpi.h>
-#include <arch/acpigen.h>
+#include <acpi/acpi.h>
+#include <acpi/acpigen.h>
 #endif
 #include "i82371eb.h"
 #include "chip.h"
diff --git a/src/southbridge/intel/i82371eb/wakeup.c b/src/southbridge/intel/i82371eb/wakeup.c
index 253433368e..45f0182edf 100644
--- a/src/southbridge/intel/i82371eb/wakeup.c
+++ b/src/southbridge/intel/i82371eb/wakeup.c
@@ -14,7 +14,7 @@
  */
 
 #include <stdint.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <arch/io.h>
 #include <console/console.h>
 #include "i82371eb.h"
diff --git a/src/southbridge/intel/i82801dx/i82801dx.h b/src/southbridge/intel/i82801dx/i82801dx.h
index 35a0bc249e..0b54fe7ec9 100644
--- a/src/southbridge/intel/i82801dx/i82801dx.h
+++ b/src/southbridge/intel/i82801dx/i82801dx.h
@@ -12,7 +12,7 @@
 #ifndef I82801DX_H
 #define I82801DX_H
 
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 
 #if !defined(__ASSEMBLER__)
 
diff --git a/src/southbridge/intel/i82801dx/smi.c b/src/southbridge/intel/i82801dx/smi.c
index c81dabe1bc..c437cc8620 100644
--- a/src/southbridge/intel/i82801dx/smi.c
+++ b/src/southbridge/intel/i82801dx/smi.c
@@ -5,7 +5,7 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <console/console.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <arch/io.h>
 #include <device/pci_ops.h>
 #include <cpu/x86/cache.h>
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index e54f2bd80f..3e9493fdbc 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -12,9 +12,9 @@
 #include <arch/io.h>
 #include <device/pci_ops.h>
 #include <arch/ioapic.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <cpu/x86/smm.h>
-#include <arch/acpigen.h>
+#include <acpi/acpigen.h>
 #include <arch/smp/mpspec.h>
 #include <cbmem.h>
 #include <string.h>
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index 8765cc1584..072f60b106 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -12,9 +12,9 @@
 #include <arch/io.h>
 #include <device/pci_ops.h>
 #include <arch/ioapic.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <cpu/x86/smm.h>
-#include <arch/acpigen.h>
+#include <acpi/acpigen.h>
 #include <cbmem.h>
 #include <string.h>
 #include "chip.h"
diff --git a/src/southbridge/intel/i82801ix/smi.c b/src/southbridge/intel/i82801ix/smi.c
index 30be71fedc..6cf0c52611 100644
--- a/src/southbridge/intel/i82801ix/smi.c
+++ b/src/southbridge/intel/i82801ix/smi.c
@@ -9,7 +9,7 @@
 #include <console/console.h>
 #include <arch/io.h>
 #include <device/pci_ops.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/smm.h>
 #include <cpu/x86/smi_deprecated.h>
diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c
index 77a8f7772b..e2658b32f9 100644
--- a/src/southbridge/intel/i82801jx/lpc.c
+++ b/src/southbridge/intel/i82801jx/lpc.c
@@ -12,9 +12,9 @@
 #include <arch/io.h>
 #include <device/pci_ops.h>
 #include <arch/ioapic.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <cpu/x86/smm.h>
-#include <arch/acpigen.h>
+#include <acpi/acpigen.h>
 #include <arch/smp/mpspec.h>
 #include <cbmem.h>
 #include <string.h>
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c
index 4edf87e7c5..0b0a9f2d39 100644
--- a/src/southbridge/intel/ibexpeak/lpc.c
+++ b/src/southbridge/intel/ibexpeak/lpc.c
@@ -13,9 +13,9 @@
 #include <device/mmio.h>
 #include <device/pci_ops.h>
 #include <arch/ioapic.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <elog.h>
-#include <arch/acpigen.h>
+#include <acpi/acpigen.h>
 #include <cbmem.h>
 #include <string.h>
 #include <cpu/x86/smm.h>
diff --git a/src/southbridge/intel/ibexpeak/madt.c b/src/southbridge/intel/ibexpeak/madt.c
index c582048853..1b2e0162f6 100644
--- a/src/southbridge/intel/ibexpeak/madt.c
+++ b/src/southbridge/intel/ibexpeak/madt.c
@@ -2,7 +2,7 @@
 /* This file is part of the coreboot project. */
 
 #include <arch/ioapic.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <arch/smp/mpspec.h>
 #include <device/device.h>
 #include <device/pci.h>
diff --git a/src/southbridge/intel/ibexpeak/me.c b/src/southbridge/intel/ibexpeak/me.c
index ea641ee5fc..bcdb17a9bb 100644
--- a/src/southbridge/intel/ibexpeak/me.c
+++ b/src/southbridge/intel/ibexpeak/me.c
@@ -9,7 +9,7 @@
  * not used unless the console loglevel is high enough.
  */
 
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/mmio.h>
diff --git a/src/southbridge/intel/ibexpeak/pch.h b/src/southbridge/intel/ibexpeak/pch.h
index fc20660e65..7e8306cce3 100644
--- a/src/southbridge/intel/ibexpeak/pch.h
+++ b/src/southbridge/intel/ibexpeak/pch.h
@@ -4,7 +4,7 @@
 #ifndef SOUTHBRIDGE_INTEL_BD82X6X_PCH_H
 #define SOUTHBRIDGE_INTEL_BD82X6X_PCH_H
 
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 
 /* PCH types */
 #define PCH_TYPE_CPT	   0x1c /* CougarPoint */
diff --git a/src/southbridge/intel/lynxpoint/acpi.c b/src/southbridge/intel/lynxpoint/acpi.c
index 48e2a29bc8..315fb65f17 100644
--- a/src/southbridge/intel/lynxpoint/acpi.c
+++ b/src/southbridge/intel/lynxpoint/acpi.c
@@ -1,8 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /* This file is part of the coreboot project. */
 
-#include <arch/acpi.h>
-#include <arch/acpigen.h>
+#include <acpi/acpi.h>
+#include <acpi/acpigen.h>
 #include <cbmem.h>
 #include <types.h>
 #include <string.h>
diff --git a/src/southbridge/intel/lynxpoint/elog.c b/src/southbridge/intel/lynxpoint/elog.c
index d19250cf6b..85d89501eb 100644
--- a/src/southbridge/intel/lynxpoint/elog.c
+++ b/src/southbridge/intel/lynxpoint/elog.c
@@ -2,7 +2,7 @@
 /* This file is part of the coreboot project. */
 
 #include <arch/io.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ops.h>
diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c
index b5fb674a26..6db647c6bf 100644
--- a/src/southbridge/intel/lynxpoint/lpc.c
+++ b/src/southbridge/intel/lynxpoint/lpc.c
@@ -11,14 +11,14 @@
 #include <pc80/i8259.h>
 #include <arch/io.h>
 #include <arch/ioapic.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <cpu/x86/smm.h>
 #include <cbmem.h>
 #include <string.h>
 #include "chip.h"
 #include "nvs.h"
 #include "pch.h"
-#include <arch/acpigen.h>
+#include <acpi/acpigen.h>
 #include <southbridge/intel/common/acpi_pirq_gen.h>
 #include <southbridge/intel/common/rtc.h>
 #include <southbridge/intel/common/spi.h>
diff --git a/src/southbridge/intel/lynxpoint/me_9.x.c b/src/southbridge/intel/lynxpoint/me_9.x.c
index 4599c26cff..2c2c6ea3c9 100644
--- a/src/southbridge/intel/lynxpoint/me_9.x.c
+++ b/src/southbridge/intel/lynxpoint/me_9.x.c
@@ -9,7 +9,7 @@
  * not used unless the console loglevel is high enough.
  */
 
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 #include <device/mmio.h>
 #include <device/pci_ops.h>
 #include <console/console.h>
diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h
index d583992ab9..8707349242 100644
--- a/src/southbridge/intel/lynxpoint/pch.h
+++ b/src/southbridge/intel/lynxpoint/pch.h
@@ -4,7 +4,7 @@
 #ifndef SOUTHBRIDGE_INTEL_LYNXPOINT_PCH_H
 #define SOUTHBRIDGE_INTEL_LYNXPOINT_PCH_H
 
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
 
 #define CROS_GPIO_DEVICE_NAME	"LynxPoint"