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authorPatrick Georgi <patrick@georgi-clan.de>2014-08-09 19:50:15 +0200
committerPatrick Georgi <patrick@georgi-clan.de>2014-08-10 05:28:48 +0200
commit77c9508f58d93e44e30952618c1b95fbc7b6faaa (patch)
treea8439f89dd263ecdd00463149c957929e1385ecf /src/southbridge
parente887ca5a745720e3d35527e4fd4e21b8c0b3b3b9 (diff)
downloadcoreboot-77c9508f58d93e44e30952618c1b95fbc7b6faaa.tar.xz
intel/fsp_bd82x6x: Fix cycle error some more
As a follow up to #6479 (63e1948643fcbd763c83b6baa6cd9a077d49f1fc), fix the remaining faulty loop. Change-Id: I2c77efe620c71e939f4d74e48f90a166c782e5f5 Found-by: Coverity Scan Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/6569 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <gaumless@gmail.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/fsp_bd82x6x/smi.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/fsp_bd82x6x/smi.c b/src/southbridge/intel/fsp_bd82x6x/smi.c
index 97d0ce4733..d035c630aa 100644
--- a/src/southbridge/intel/fsp_bd82x6x/smi.c
+++ b/src/southbridge/intel/fsp_bd82x6x/smi.c
@@ -132,7 +132,7 @@ static void dump_gpe0_status(u32 gpe0_sts)
{
int i;
printk(BIOS_DEBUG, "GPE0_STS: ");
- for (i=31; i<= 16; i--) {
+ for (i=31; i>= 16; i--) {
if (gpe0_sts & (1 << i)) printk(BIOS_DEBUG, "GPIO%d ", (i-16));
}
if (gpe0_sts & (1 << 14)) printk(BIOS_DEBUG, "USB4 ");