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authorMatt DeVillier <matt.devillier@gmail.com>2018-12-24 21:46:46 -0600
committerMatt DeVillier <matt.devillier@gmail.com>2020-03-03 14:18:01 +0000
commit8187f11d1a3b21a4cf38f4560f9c9921deb06757 (patch)
tree42214c477d60469950dc765fe9e08e51dc4a5ba7 /src/southbridge
parent63cdea2b2d6062f02a17b9f2e136f714f403f6f4 (diff)
downloadcoreboot-8187f11d1a3b21a4cf38f4560f9c9921deb06757.tar.xz
sb/lynxpoint: hook up smmstore
Adapted from implementation in sb/intel/common. Test: build/boot variants of google/{beltino,slippy} with Tianocore and SMMSTORE enabled Change-Id: I64f520d17146206b8b9b41fc4f827539c5cfd507 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39189 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/lynxpoint/smihandler.c26
1 files changed, 25 insertions, 1 deletions
diff --git a/src/southbridge/intel/lynxpoint/smihandler.c b/src/southbridge/intel/lynxpoint/smihandler.c
index 72c344757d..4ac4ff948d 100644
--- a/src/southbridge/intel/lynxpoint/smihandler.c
+++ b/src/southbridge/intel/lynxpoint/smihandler.c
@@ -29,7 +29,7 @@
#include <southbridge/intel/common/finalize.h>
#include <northbridge/intel/haswell/haswell.h>
#include <cpu/intel/haswell/haswell.h>
-
+#include <smmstore.h>
#include "me.h"
#include "pch.h"
#include "nvs.h"
@@ -266,6 +266,26 @@ static void southbridge_smi_gsmi(void)
*ret = gsmi_exec(sub_command, param);
}
+static void southbridge_smi_store(void)
+{
+ u8 sub_command, ret;
+ em64t101_smm_state_save_area_t *io_smi =
+ smi_apmc_find_state_save(APM_CNT_SMMSTORE);
+ uint32_t reg_ebx;
+
+ if (!io_smi)
+ return;
+ /* Command and return value in EAX */
+ sub_command = (io_smi->rax >> 8) & 0xff;
+
+ /* Parameter buffer in EBX */
+ reg_ebx = io_smi->rbx;
+
+ /* drivers/smmstore/smi.c */
+ ret = smmstore_exec(sub_command, (void *)reg_ebx);
+ io_smi->rax = ret;
+}
+
static void southbridge_smi_apmc(void)
{
u8 reg8;
@@ -332,6 +352,10 @@ static void southbridge_smi_apmc(void)
if (CONFIG(ELOG_GSMI))
southbridge_smi_gsmi();
break;
+ case APM_CNT_SMMSTORE:
+ if (CONFIG(SMMSTORE))
+ southbridge_smi_store();
+ break;
}
mainboard_smi_apmc(reg8);