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authorGabe Black <gabeblack@google.com>2014-03-27 21:52:43 -0700
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-07-05 11:36:20 +0200
commit93d9f92cfbb214718e211aee71ac869c77f725ee (patch)
tree5ce61557bc84bd374744ba4ca07a8a48825ae58a /src/southbridge
parent1e187356e831583830a22cf051c792470d0440f5 (diff)
downloadcoreboot-93d9f92cfbb214718e211aee71ac869c77f725ee.tar.xz
spi: Change spi_xfer to work in units of bytes instead of bits.
Whenever spi_xfer is called and whenver it's implemented, the natural unit for the amount of data being transfered is bytes. The API expected things to be expressed in bits, however, which led to a lot of multiplying and dividing by eight, and checkes to make sure things were multiples of eight. All of that can now be removed. BUG=None TEST=Built and booted on link, falco, peach_pit and nyan and looked for SPI errors in the firmware log. Built for rambi. BRANCH=None Change-Id: I02365bdb6960a35def7be7a0cd1aa0a2cc09392f Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://chromium-review.googlesource.com/192049 Reviewed-by: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> [km: cherry-pick from chromium] Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6175 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/agesa/hudson/spi.c19
-rw-r--r--src/southbridge/amd/cimx/sb800/spi.c7
-rw-r--r--src/southbridge/intel/common/spi.c15
3 files changed, 13 insertions, 28 deletions
diff --git a/src/southbridge/amd/agesa/hudson/spi.c b/src/southbridge/amd/agesa/hudson/spi.c
index c19d1a0ff8..720b26f83e 100644
--- a/src/southbridge/amd/agesa/hudson/spi.c
+++ b/src/southbridge/amd/agesa/hudson/spi.c
@@ -87,21 +87,14 @@ void spi_init(void)
}
int spi_xfer(struct spi_slave *slave, const void *dout,
- unsigned int bitsout, void *din, unsigned int bitsin)
+ unsigned int bytesout, void *din, unsigned int bytesin)
{
/* First byte is cmd which can not being sent through FIFO. */
- uint8_t cmd = *(uint8_t *)dout++;
- uint8_t readoffby1;
-#if !CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE
- uint8_t readwrite;
-#endif
- uint8_t bytesout, bytesin;
- uint8_t count;
-
- bitsout -= 8;
- bytesout = bitsout / 8;
- bytesin = bitsin / 8;
+ u8 cmd = *(u8 *)dout++;
+ u8 readoffby1;
+ u8 count;
+ bytesout--;
readoffby1 = bytesout ? 0 : 1;
#if CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE
@@ -110,7 +103,7 @@ int spi_xfer(struct spi_slave *slave, const void *dout,
spi_write(0x1E, 6);
spi_write(0x1F, bytesin); /* SpiExtRegIndx [6] - RxByteCount */
#else
- readwrite = (bytesin + readoffby1) << 4 | bytesout;
+ u8 readwrite = (bytesin + readoffby1) << 4 | bytesout;
spi_write(SPI_REG_CNTRL01, readwrite);
#endif
spi_write(SPI_REG_OPCODE, cmd);
diff --git a/src/southbridge/amd/cimx/sb800/spi.c b/src/southbridge/amd/cimx/sb800/spi.c
index d059f5eb00..a46349e933 100644
--- a/src/southbridge/amd/cimx/sb800/spi.c
+++ b/src/southbridge/amd/cimx/sb800/spi.c
@@ -57,18 +57,15 @@ void spi_init()
}
int spi_xfer(struct spi_slave *slave, const void *dout,
- unsigned int bitsout, void *din, unsigned int bitsin)
+ unsigned int bytesout, void *din, unsigned int bytesin)
{
/* First byte is cmd which can not being sent through FIFO. */
u8 cmd = *(u8 *)dout++;
u8 readoffby1;
u8 readwrite;
- u8 bytesout, bytesin;
u8 count;
- bitsout -= 8;
- bytesout = bitsout / 8;
- bytesin = bitsin / 8;
+ bytesout--;
readoffby1 = bytesout ? 0 : 1;
diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c
index 14d2f54d28..76fd22691f 100644
--- a/src/southbridge/intel/common/spi.c
+++ b/src/southbridge/intel/common/spi.c
@@ -551,7 +551,7 @@ static int spi_is_multichip (void)
}
int spi_xfer(struct spi_slave *slave, const void *dout,
- unsigned int bitsout, void *din, unsigned int bitsin)
+ unsigned int bytesout, void *din, unsigned int bytesin)
{
uint16_t control;
int16_t opcode_index;
@@ -559,26 +559,21 @@ int spi_xfer(struct spi_slave *slave, const void *dout,
int status;
spi_transaction trans = {
- dout, bitsout / 8,
- din, bitsin / 8,
+ dout, bytesout,
+ din, bytesin,
0xff, 0xff, 0
};
/* There has to always at least be an opcode. */
- if (!bitsout || !dout) {
+ if (!bytesout || !dout) {
printk(BIOS_DEBUG, "ICH SPI: No opcode for transfer\n");
return -1;
}
/* Make sure if we read something we have a place to put it. */
- if (bitsin != 0 && !din) {
+ if (bytesin != 0 && !din) {
printk(BIOS_DEBUG, "ICH SPI: Read but no target buffer\n");
return -1;
}
- /* Right now we don't support writing partial bytes. */
- if (bitsout % 8 || bitsin % 8) {
- printk(BIOS_DEBUG, "ICH SPI: Accessing partial bytes not supported\n");
- return -1;
- }
if (ich_status_poll(SPIS_SCIP, 0) == -1)
return -1;