diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-10-31 18:42:59 +0100 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2018-11-01 11:26:33 +0000 |
| commit | 9e4fa330ef657ac035859c537403d9c80c55a83b (patch) | |
| tree | f485c4c1bd8d2e465d8281cc748774d99266caa3 /src/southbridge | |
| parent | c4e41937150beab78ba5d492b7b22799d20a0ee4 (diff) | |
| download | coreboot-9e4fa330ef657ac035859c537403d9c80c55a83b.tar.xz | |
sb/intel/common/pciehp.h: Add missing license header
Change-Id: Ia669b25683c138d96be00db90d01cf406db4c2eb
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/29404
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/intel/common/pciehp.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/src/southbridge/intel/common/pciehp.h b/src/southbridge/intel/common/pciehp.h index 7bf47f35a0..aa2b444666 100644 --- a/src/southbridge/intel/common/pciehp.h +++ b/src/southbridge/intel/common/pciehp.h @@ -1,2 +1,20 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef SOUTHBRIDGE_INTEL_COMMON_PCIEHP_H +#define SOUTHBRIDGE_INTEL_COMMON_PCIEHP_H + void intel_acpi_pcie_hotplug_generator(u8 *hotplug_map, int port_number); void intel_acpi_pcie_hotplug_scan_slot(struct bus *bus); + +#endif |