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| author | Bora Guvendik <bora.guvendik@intel.com> | 2019-05-24 14:14:53 -0700 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2019-09-09 13:10:33 +0000 |
| commit | c42ef561a09decc6d82d0e57ea4e5d796b1c25ac (patch) | |
| tree | 1ede3b10f665e17c6e373cb909b07f81efdbc6af /src/southbridge | |
| parent | 22d66efe652534a476e8165aa902138e19dedeb1 (diff) | |
| download | coreboot-c42ef561a09decc6d82d0e57ea4e5d796b1c25ac.tar.xz | |
soc/intel/cannonlake: Add ability to disable Heci1
Decide if HECI1 should be hidden prior to boot to OS.
BUG=none
TEST=Boot to OS, verify if Heci1 is disabled on hatch system
using FSP 1344.
Change-Id: I7c63316c8b04fb101d34064daac5ba4fdc05a63c
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32992
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/southbridge')
0 files changed, 0 insertions, 0 deletions