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| author | Ronald G. Minnich <rminnich@gmail.com> | 2006-03-14 19:58:14 +0000 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2006-03-14 19:58:14 +0000 |
| commit | c994c973c654817f5e764615776b78b84cd21910 (patch) | |
| tree | 37e35c7cd905ef9b5cacc8dbd76628c134e5f68c /src/southbridge | |
| parent | d96e098def3ed64be0b775d4a6c058821e33b5ef (diff) | |
| download | coreboot-c994c973c654817f5e764615776b78b84cd21910.tar.xz | |
Fix for nehemiah
other fixes for gx2 ram init.
support for sharplfg00l04 -- not working yet.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2197 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/amd/cs5535/cs5535_early_setup.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/southbridge/amd/cs5535/cs5535_early_setup.c b/src/southbridge/amd/cs5535/cs5535_early_setup.c index ae3b7df441..6c32498aa9 100644 --- a/src/southbridge/amd/cs5535/cs5535_early_setup.c +++ b/src/southbridge/amd/cs5535/cs5535_early_setup.c @@ -103,10 +103,15 @@ static int cs5535_early_setup(void) print_debug("reboot from BIOS reset\n\r"); return; } + print_debug("Setup idsel\r\n"); cs5535_setup_idsel(); + print_debug("Setup iobase\r\n"); cs5535_setup_iobase(); + print_debug("Setup gpio\r\n"); cs5535_setup_gpio(); + print_debug("Setup cis_mode\r\n"); cs5535_setup_cis_mode(); + print_debug("Setup smbus\r\n"); cs5535_enable_smbus(); //get_memory_speed(); dummy(); |