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| author | Eric Lai <ericr_lai@compal.corp-partner.google.com> | 2020-09-09 16:31:12 +0800 |
|---|---|---|
| committer | Karthik Ramasubramanian <kramasub@google.com> | 2020-09-18 17:44:16 +0000 |
| commit | 0647f614cd36840989ea5fb3559ecb12286704c4 (patch) | |
| tree | 1e057316b1220c3d168f255b424e32e22bdc5978 /src/southbridge | |
| parent | fc161cbb36013b332822e0cad549388b333f24ec (diff) | |
| download | coreboot-0647f614cd36840989ea5fb3559ecb12286704c4.tar.xz | |
mb/google/octopus/variants/fleex: support LTE power sequence
GPIOs related to power sequence are
GPIO_67 - EN_PP3300
GPIO_117 - FULL_CARD_POWER_ON_OFF
GPIO_161 - PLT_RST_LTE_L
1. Power on: GPIO_67 -> 0ms -> GPIO_117 -> 30ms -> GPIO_161
2. Power off: GPIO_161 -> 30ms -> GPIO_117 -> 100ms -> GPIO_67
3. Power reset:
- keep GPIO_67 and GPIO_117 high and
- pull down GPIO_161 for 30ms then release it.
BUG=b:168075958
BRANCH=octopus
TEST=build image and verify on the DUT with LTE DB.
Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: I9b56ef8ff346c1d4edd5aad04d4a7396c4702ffc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45193
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Henry Sun <henrysun@google.com>
Reviewed-by: Ivy Jian <ivy_jian@compal.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge')
0 files changed, 0 insertions, 0 deletions