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| author | Angel Pons <th3fanbus@gmail.com> | 2021-03-18 17:39:25 +0100 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2021-03-22 13:01:07 +0000 |
| commit | 1895d1a181a0e50f05f03c247d9827e976b9b333 (patch) | |
| tree | 3d7853acb8ef8c7845072b363f40ba256cc0dd0b /src/southbridge | |
| parent | 50811e2deb09f43ea08b1cb91c13d5f75f311ba6 (diff) | |
| download | coreboot-1895d1a181a0e50f05f03c247d9827e976b9b333.tar.xz | |
{lynxpoint,broadwell}/hda_verb.c: Drop effect-free write
This bit is hardwired to 1 (Intel High Definition Audio mode).
Change-Id: I3683497c5e2446f1d8319037583890b5d0a8a95c
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51644
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/intel/lynxpoint/azalia.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/southbridge/intel/lynxpoint/azalia.c b/src/southbridge/intel/lynxpoint/azalia.c index ef450a501f..ad84b0093a 100644 --- a/src/southbridge/intel/lynxpoint/azalia.c +++ b/src/southbridge/intel/lynxpoint/azalia.c @@ -81,9 +81,6 @@ static void azalia_pch_init(struct device *dev, u8 *base) if (!pch_is_lp()) pci_and_config32(dev, 0xd0, ~(1 << 31)); - // Select Azalia mode - pci_or_config8(dev, 0x40, 1); // Audio Control - // Docking not supported pci_and_config8(dev, 0x4d, (u8)~(1 << 7)); // Docking Status |