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authorStefan Reinauer <stepan@coresystems.de>2010-01-16 16:37:27 +0000
committerStefan Reinauer <stepan@openbios.org>2010-01-16 16:37:27 +0000
commit38c9965977bd29504a06689ec6b1b39e5aaeca4d (patch)
treefc1b7cdc1d1a644156ebbd9cc01e74ee200af760 /src/southbridge
parent67cd80299057d83790da235c4dc7286298dc6b16 (diff)
downloadcoreboot-38c9965977bd29504a06689ec6b1b39e5aaeca4d.tar.xz
(trivial) cosmetics for i82801gx cmos failover.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5017 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/i82801gx/cmos_failover.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/src/southbridge/intel/i82801gx/cmos_failover.c b/src/southbridge/intel/i82801gx/cmos_failover.c
index 9eae0cbae7..f26fd4ffd9 100644
--- a/src/southbridge/intel/i82801gx/cmos_failover.c
+++ b/src/southbridge/intel/i82801gx/cmos_failover.c
@@ -20,13 +20,12 @@
#include "i82801gx.h"
-#define RTC_FAILED (1 <<2)
-#define GEN_PMCON_3 0xa4
+#define RTC_FAILED (1 << 2)
+#define GEN_PMCON_3 0xa4
static void check_cmos_failed(void)
{
- u8 byte;
- byte = pci_read_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3);
+ u8 byte = pci_read_config8(PCI_DEV(0, 0x1f, 0), GEN_PMCON_3);
if (byte & RTC_FAILED) {
// clear bit 1 and bit 2
byte = cmos_read(RTC_BOOT_BYTE);