summaryrefslogtreecommitdiff
path: root/src/southbridge
diff options
context:
space:
mode:
authorMartin Roth <martinroth@google.com>2017-01-10 11:15:13 -0700
committerMartin Roth <martinroth@google.com>2017-01-12 17:19:26 +0100
commit4fb64d0b880c698cba92f5ec2e4d39f3bdb92fc6 (patch)
tree1fd1c6db679608dae1e2c407cd34b0cfcdb03443 /src/southbridge
parentfeb4ef6d92bdbcd12b2cd97b6446fb64b76cfef4 (diff)
downloadcoreboot-4fb64d0b880c698cba92f5ec2e4d39f3bdb92fc6.tar.xz
fsp 1.0 systems: Check for NULL when saving HobListPtr
Die if cbmem_add can't allocate memory for the hob pointer. This shouldn't ever happen, but it's a reasonable check. - fsp_broadwell_de already had a check, but it returned to someplace inside the FSP. Just die instead. Change-Id: Ieef8d6ab81aab0ec3d52b729e34566bb34ee0623 Found-by: Coverity Scan #1291162 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/18092 Tested-by: build bot (Jenkins) Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/fsp_i89xx/romstage.c4
-rw-r--r--src/southbridge/intel/fsp_rangeley/romstage.c4
2 files changed, 6 insertions, 2 deletions
diff --git a/src/southbridge/intel/fsp_i89xx/romstage.c b/src/southbridge/intel/fsp_i89xx/romstage.c
index 09cce59444..c2b5221c48 100644
--- a/src/southbridge/intel/fsp_i89xx/romstage.c
+++ b/src/southbridge/intel/fsp_i89xx/romstage.c
@@ -208,7 +208,9 @@ void romstage_main_continue(EFI_STATUS status, VOID *HobListPtr) {
}
/* Save the HOB pointer in CBMEM to be used in ramstage. */
- cbmem_hob_ptr = cbmem_add (CBMEM_ID_HOB_POINTER, sizeof(HobListPtr));
+ cbmem_hob_ptr = cbmem_add(CBMEM_ID_HOB_POINTER, sizeof(HobListPtr));
+ if (cbmem_hob_ptr == NULL)
+ die("Could not allocate cbmem for HOB pointer");
*(uint32_t*)cbmem_hob_ptr = (uint32_t)HobListPtr;
post_code(0x4f);
diff --git a/src/southbridge/intel/fsp_rangeley/romstage.c b/src/southbridge/intel/fsp_rangeley/romstage.c
index 042aaf93dd..74df69112c 100644
--- a/src/southbridge/intel/fsp_rangeley/romstage.c
+++ b/src/southbridge/intel/fsp_rangeley/romstage.c
@@ -122,7 +122,9 @@ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr) {
cbmem_was_initted = !cbmem_recovery(0);
/* Save the HOB pointer in CBMEM to be used in ramstage*/
- cbmem_hob_ptr = cbmem_add (CBMEM_ID_HOB_POINTER, sizeof(*hob_list_ptr));
+ cbmem_hob_ptr = cbmem_add(CBMEM_ID_HOB_POINTER, sizeof(*hob_list_ptr));
+ if (cbmem_hob_ptr == NULL)
+ die("Could not allocate cbmem for HOB pointer");
*(u32*)cbmem_hob_ptr = (u32)hob_list_ptr;
post_code(0x4e);