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authorFurquan Shaikh <furquan@chromium.org>2016-11-22 11:43:58 -0800
committerFurquan Shaikh <furquan@google.com>2016-12-04 03:03:58 +0100
commit52896c6c33250036928406d9dc38aa2ce1906b05 (patch)
tree3030f7762c76a2e6cacfa903282e771673dba0bf /src/southbridge
parent1d56eef728a9d9266b2dde9174520900ee87f9f2 (diff)
downloadcoreboot-52896c6c33250036928406d9dc38aa2ce1906b05.tar.xz
spi_flash: Move spi flash opcodes to spi_flash.h
BUG=chrome-os-partner:59832 BRANCH=None TEST=Compiles successfully Change-Id: I3b6656923bb312de470da43a23f66f350e1cebc7 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/17680 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/fsp_rangeley/spi.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/southbridge/intel/fsp_rangeley/spi.c b/src/southbridge/intel/fsp_rangeley/spi.c
index 007c61270d..8b0c3c1f72 100644
--- a/src/southbridge/intel/fsp_rangeley/spi.c
+++ b/src/southbridge/intel/fsp_rangeley/spi.c
@@ -22,6 +22,7 @@
#include <console/console.h>
#include <device/pci_ids.h>
+#include <spi_flash.h>
#include <spi-generic.h>
static int ich_status_poll(u16 bitmask, int wait_til_set);