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authorStefan Reinauer <stepan@coresystems.de>2010-03-17 03:40:23 +0000
committerStefan Reinauer <stepan@openbios.org>2010-03-17 03:40:23 +0000
commit5c32d242e475bcc40a92538efc4ac0fa9d21c7af (patch)
tree4dceccc389b149d45dabbf764ef583e9260d1de5 /src/southbridge
parent48f3e2b5e1fa75ff9d43485ac9a620255e1048bf (diff)
downloadcoreboot-5c32d242e475bcc40a92538efc4ac0fa9d21c7af.tar.xz
bug fix for IOAPIC on i82801dx.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5245 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/i82801dx/i82801dx_lpc.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/i82801dx/i82801dx_lpc.c b/src/southbridge/intel/i82801dx/i82801dx_lpc.c
index 99456bae9a..0aff9f4560 100644
--- a/src/southbridge/intel/i82801dx/i82801dx_lpc.c
+++ b/src/southbridge/intel/i82801dx/i82801dx_lpc.c
@@ -38,8 +38,8 @@ typedef struct southbridge_intel_i82801dx_config config_t;
static void i82801dx_enable_ioapic(struct device *dev)
{
u32 reg32;
- volatile u32 *ioapic_index = (volatile u32 *)IO_APIC_ADDR;
- volatile u32 *ioapic_data = (volatile u32 *)IO_APIC_ADDR + 0x10;
+ volatile u32 *ioapic_index = (volatile u32 *)(IO_APIC_ADDR);
+ volatile u32 *ioapic_data = (volatile u32 *)(IO_APIC_ADDR + 0x10);
/* Set ACPI base address (I/O space). */
pci_write_config32(dev, PMBASE, (PMBASE_ADDR | 1));