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| author | Stefan Reinauer <reinauer@chromium.org> | 2012-06-06 13:40:12 -0700 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2012-07-24 02:37:39 +0200 |
| commit | 5f3aca39d33183ff7d74116e6d2ef2b164fdea23 (patch) | |
| tree | 2afddfc97149062711c2df6e47f63da8b9e089a1 /src/southbridge | |
| parent | 00671887398a8266f65278318e570cb2a0cf079c (diff) | |
| download | coreboot-5f3aca39d33183ff7d74116e6d2ef2b164fdea23.tar.xz | |
SPI flash layer: remove unused function spi_flash_free()
We don't ever free memory in coreboot, hence drop spi_flash_free() and
spi_free_slave()
Change-Id: I0ca3f78574ceb4516e7d33c06ab1a58abfb3b0ec
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1273
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/spi.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/src/southbridge/intel/bd82x6x/spi.c b/src/southbridge/intel/bd82x6x/spi.c index ccc530d884..4cd9af037c 100644 --- a/src/southbridge/intel/bd82x6x/spi.c +++ b/src/southbridge/intel/bd82x6x/spi.c @@ -280,12 +280,6 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, return slave; } -void spi_free_slave(struct spi_slave *_slave) -{ - ich_spi_slave *slave = (ich_spi_slave *)_slave; - free(slave); -} - /* * Check if this device ID matches one of supported Intel PCH devices. * |