diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2010-05-25 16:35:51 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-05-25 16:35:51 +0000 |
| commit | 75a05dc0b91fb5748bb4f8b0eee9cee168c2cda1 (patch) | |
| tree | d9702dd075518d17753d91ca687c1deb2f0e554d /src/southbridge | |
| parent | da3237376f8f4d35731ef9abfb7a7e5b94926198 (diff) | |
| download | coreboot-75a05dc0b91fb5748bb4f8b0eee9cee168c2cda1.tar.xz | |
fix most usbdebug warnings and fix function names.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5587 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
5 files changed, 5 insertions, 5 deletions
diff --git a/src/southbridge/amd/sb600/sb600_enable_usbdebug.c b/src/southbridge/amd/sb600/sb600_enable_usbdebug.c index 5fded2fa3f..fe3df8e1c4 100644 --- a/src/southbridge/amd/sb600/sb600_enable_usbdebug.c +++ b/src/southbridge/amd/sb600/sb600_enable_usbdebug.c @@ -27,7 +27,7 @@ #define EHCI_BAR 0xFEF00000 #define EHCI_DEBUG_OFFSET 0xE0 -static void sb600_enable_usbdebug_direct(u32 port) +static void sb600_enable_usbdebug(u32 port) { set_debug_port(port); pci_write_config32(PCI_DEV(0, SB600_DEVN_BASE + 0x13, 5), diff --git a/src/southbridge/amd/sb700/sb700_enable_usbdebug.c b/src/southbridge/amd/sb700/sb700_enable_usbdebug.c index b739fe2b5a..771a43a44e 100644 --- a/src/southbridge/amd/sb700/sb700_enable_usbdebug.c +++ b/src/southbridge/amd/sb700/sb700_enable_usbdebug.c @@ -27,7 +27,7 @@ #define EHCI_BAR 0xFEF00000 #define EHCI_DEBUG_OFFSET 0xE0 -static void sb700_enable_usbdebug_direct(u32 port) +static void sb700_enable_usbdebug(u32 port) { set_debug_port(port); pci_write_config32(PCI_DEV(0, SB700_DEVN_BASE + 0x13, 5), diff --git a/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c b/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c index ead7bdca7f..a7e0799943 100644 --- a/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c +++ b/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c @@ -36,7 +36,7 @@ void set_debug_port(unsigned port) write32(EHCI_BAR + EHCI_DEBUG_OFFSET, dbgctl); } -static void i82801gx_enable_usbdebug_direct(unsigned port) +static void i82801gx_enable_usbdebug(unsigned port) { pci_write_config32(PCI_DEV(0, 0x1d, 7), EHCI_BAR_INDEX, EHCI_BAR); pci_write_config8(PCI_DEV(0, 0x1d, 7), 0x04, 0x2); // Memory Space Enable diff --git a/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c b/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c index 1c7a26bffc..b980c9e15c 100644 --- a/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c +++ b/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c @@ -41,7 +41,7 @@ static void set_debug_port(unsigned port) } -static void mcp55_enable_usbdebug_direct(unsigned port) +static void mcp55_enable_usbdebug(unsigned port) { set_debug_port(port); pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+2, 1), EHCI_BAR_INDEX, EHCI_BAR); diff --git a/src/southbridge/sis/sis966/sis966_enable_usbdebug.c b/src/southbridge/sis/sis966/sis966_enable_usbdebug.c index f17a79e6c4..520383ea06 100644 --- a/src/southbridge/sis/sis966/sis966_enable_usbdebug.c +++ b/src/southbridge/sis/sis966/sis966_enable_usbdebug.c @@ -41,7 +41,7 @@ static void set_debug_port(unsigned port) } -static void sis966_enable_usbdebug_direct(unsigned port) +static void sis966_enable_usbdebug(unsigned port) { set_debug_port(port); pci_write_config32(PCI_DEV(0, SIS966_DEVN_BASE+2, 1), EHCI_BAR_INDEX, EHCI_BAR); |