diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-09-21 11:42:09 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-10-24 10:01:55 +0000 |
commit | 78d338ccb9ca9d03e516c27beb3724be38d38ecf (patch) | |
tree | 060bbd99d4974a8250b7e19040d67518b2072623 /src/southbridge | |
parent | 17ad4598e9d3d302cc45c86a8e11aac62928c83c (diff) | |
download | coreboot-78d338ccb9ca9d03e516c27beb3724be38d38ecf.tar.xz |
sb/amd: Use 'unsigned int' to bare use of 'unsigned'
Change-Id: I05f9ea97ea80ac7a8f34845c59bd66e424ba2991
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28709
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge')
-rw-r--r-- | src/southbridge/amd/amd8111/ac97.c | 4 | ||||
-rw-r--r-- | src/southbridge/amd/amd8111/acpi.c | 16 | ||||
-rw-r--r-- | src/southbridge/amd/amd8111/amd8111_smbus.h | 17 | ||||
-rw-r--r-- | src/southbridge/amd/amd8111/early_smbus.c | 15 | ||||
-rw-r--r-- | src/southbridge/amd/amd8111/ide.c | 4 | ||||
-rw-r--r-- | src/southbridge/amd/amd8111/lpc.c | 4 | ||||
-rw-r--r-- | src/southbridge/amd/amd8111/nic.c | 4 | ||||
-rw-r--r-- | src/southbridge/amd/amd8111/smbus.c | 4 | ||||
-rw-r--r-- | src/southbridge/amd/amd8111/usb.c | 4 | ||||
-rw-r--r-- | src/southbridge/amd/amd8111/usb2.c | 4 | ||||
-rw-r--r-- | src/southbridge/amd/cs5536/cs5536.h | 2 | ||||
-rw-r--r-- | src/southbridge/amd/cs5536/early_smbus.c | 2 |
12 files changed, 44 insertions, 36 deletions
diff --git a/src/southbridge/amd/amd8111/ac97.c b/src/southbridge/amd/amd8111/ac97.c index ce5911fb68..9e458ea83f 100644 --- a/src/southbridge/amd/amd8111/ac97.c +++ b/src/southbridge/amd/amd8111/ac97.c @@ -20,8 +20,8 @@ #include <device/pci_ops.h> #include "amd8111.h" -static void lpci_set_subsystem(struct device *dev, unsigned vendor, - unsigned device) +static void lpci_set_subsystem(struct device *dev, unsigned int vendor, + unsigned int device) { pci_write_config32(dev, 0x2c, ((device & 0xffff) << 16) | (vendor & 0xffff)); diff --git a/src/southbridge/amd/amd8111/acpi.c b/src/southbridge/amd/amd8111/acpi.c index da7a1d8086..8dc2007500 100644 --- a/src/southbridge/amd/amd8111/acpi.c +++ b/src/southbridge/amd/amd8111/acpi.c @@ -36,7 +36,7 @@ static int lsmbus_recv_byte(struct device *dev) { - unsigned device; + unsigned int device; struct resource *res; device = dev->path.i2c.device; @@ -47,7 +47,7 @@ static int lsmbus_recv_byte(struct device *dev) static int lsmbus_send_byte(struct device *dev, uint8_t val) { - unsigned device; + unsigned int device; struct resource *res; device = dev->path.i2c.device; @@ -59,7 +59,7 @@ static int lsmbus_send_byte(struct device *dev, uint8_t val) static int lsmbus_read_byte(struct device *dev, uint8_t address) { - unsigned device; + unsigned int device; struct resource *res; device = dev->path.i2c.device; @@ -70,7 +70,7 @@ static int lsmbus_read_byte(struct device *dev, uint8_t address) static int lsmbus_write_byte(struct device *dev, uint8_t address, uint8_t val) { - unsigned device; + unsigned int device; struct resource *res; device = dev->path.i2c.device; @@ -82,7 +82,7 @@ static int lsmbus_write_byte(struct device *dev, uint8_t address, uint8_t val) static int lsmbus_block_read(struct device *dev, uint8_t cmd, u8 bytes, u8 *buffer) { - unsigned device; + unsigned int device; struct resource *res; device = dev->path.i2c.device; @@ -94,7 +94,7 @@ static int lsmbus_block_read(struct device *dev, uint8_t cmd, u8 bytes, static int lsmbus_block_write(struct device *dev, uint8_t cmd, u8 bytes, const u8 *buffer) { - unsigned device; + unsigned int device; struct resource *res; device = dev->path.i2c.device; @@ -217,8 +217,8 @@ static void acpi_enable_resources(struct device *dev) } -static void lpci_set_subsystem(struct device *dev, unsigned vendor, - unsigned device) +static void lpci_set_subsystem(struct device *dev, unsigned int vendor, + unsigned int device) { pci_write_config32(dev, 0x7c, ((device & 0xffff) << 16) | (vendor & 0xffff)); diff --git a/src/southbridge/amd/amd8111/amd8111_smbus.h b/src/southbridge/amd/amd8111/amd8111_smbus.h index 944c6018f1..33856b389c 100644 --- a/src/southbridge/amd/amd8111/amd8111_smbus.h +++ b/src/southbridge/amd/amd8111/amd8111_smbus.h @@ -63,7 +63,7 @@ static int smbus_wait_until_done(unsigned smbus_io_base) return loops?0:SMBUS_WAIT_UNTIL_DONE_TIMEOUT; } -static int do_smbus_recv_byte(unsigned smbus_io_base, unsigned device) +static int do_smbus_recv_byte(unsigned smbus_io_base, unsigned int device) { unsigned global_status_register; unsigned byte; @@ -109,7 +109,8 @@ static int do_smbus_recv_byte(unsigned smbus_io_base, unsigned device) return byte; } -static int do_smbus_send_byte(unsigned smbus_io_base, unsigned device, unsigned value) +static int do_smbus_send_byte(unsigned smbus_io_base, unsigned int device, + unsigned value) { unsigned global_status_register; @@ -151,7 +152,8 @@ static int do_smbus_send_byte(unsigned smbus_io_base, unsigned device, unsigned } -static int do_smbus_read_byte(unsigned smbus_io_base, unsigned device, unsigned address) +static int do_smbus_read_byte(unsigned smbus_io_base, unsigned int device, + unsigned int address) { unsigned global_status_register; unsigned byte; @@ -197,7 +199,8 @@ static int do_smbus_read_byte(unsigned smbus_io_base, unsigned device, unsigned return byte; } -static int do_smbus_write_byte(unsigned smbus_io_base, unsigned device, unsigned address, unsigned char val) +static int do_smbus_write_byte(unsigned smbus_io_base, unsigned int device, + unsigned int address, unsigned char val) { unsigned global_status_register; @@ -235,7 +238,8 @@ static int do_smbus_write_byte(unsigned smbus_io_base, unsigned device, unsigned return 0; } -static int do_smbus_block_read(unsigned smbus_io_base, unsigned device, unsigned cmd, u8 bytes, u8 *buf) +static int do_smbus_block_read(unsigned smbus_io_base, unsigned int device, + unsigned cmd, u8 bytes, u8 *buf) { unsigned global_status_register; unsigned i; @@ -291,7 +295,8 @@ static int do_smbus_block_read(unsigned smbus_io_base, unsigned device, unsigned return i; } -static int do_smbus_block_write(unsigned smbus_io_base, unsigned device, unsigned cmd, u8 bytes, const u8 *buf) +static int do_smbus_block_write(unsigned smbus_io_base, unsigned int device, + unsigned cmd, u8 bytes, const u8 *buf) { unsigned global_status_register; unsigned i; diff --git a/src/southbridge/amd/amd8111/early_smbus.c b/src/southbridge/amd/amd8111/early_smbus.c index f2aa34c26e..4925c86abe 100644 --- a/src/southbridge/amd/amd8111/early_smbus.c +++ b/src/southbridge/amd/amd8111/early_smbus.c @@ -39,32 +39,35 @@ static void enable_smbus(void) printk(BIOS_SPEW, "SMBus controller enabled\n"); } -static inline int smbus_recv_byte(unsigned device) +static inline int smbus_recv_byte(unsigned int device) { return do_smbus_recv_byte(SMBUS_IO_BASE, device); } -static inline int smbus_send_byte(unsigned device, unsigned char val) +static inline int smbus_send_byte(unsigned int device, unsigned char val) { return do_smbus_send_byte(SMBUS_IO_BASE, device, val); } -static inline int smbus_read_byte(unsigned device, unsigned address) +static inline int smbus_read_byte(unsigned int device, unsigned int address) { return do_smbus_read_byte(SMBUS_IO_BASE, device, address); } -static inline int smbus_write_byte(unsigned device, unsigned address, unsigned char val) +static inline int smbus_write_byte(unsigned int device, unsigned int address, + unsigned char val) { return do_smbus_write_byte(SMBUS_IO_BASE, device, address, val); } -static inline int smbus_block_read(unsigned device, unsigned cmd, u8 bytes, u8 *buf) +static inline int smbus_block_read(unsigned int device, unsigned cmd, u8 bytes, + u8 *buf) { return do_smbus_block_read(SMBUS_IO_BASE, device, cmd, bytes, buf); } -static inline int smbus_block_write(unsigned device, unsigned cmd, u8 bytes, const u8 *buf) +static inline int smbus_block_write(unsigned int device, unsigned cmd, u8 bytes, + const u8 *buf) { return do_smbus_block_write(SMBUS_IO_BASE, device, cmd, bytes, buf); } diff --git a/src/southbridge/amd/amd8111/ide.c b/src/southbridge/amd/amd8111/ide.c index 9b6577acca..420e28e157 100644 --- a/src/southbridge/amd/amd8111/ide.c +++ b/src/southbridge/amd/amd8111/ide.c @@ -53,8 +53,8 @@ static void ide_init(struct device *dev) pci_write_config16(dev, 0x42, word); } -static void lpci_set_subsystem(struct device *dev, unsigned vendor, - unsigned device) +static void lpci_set_subsystem(struct device *dev, unsigned int vendor, + unsigned int device) { pci_write_config32(dev, 0x70, ((device & 0xffff) << 16) | (vendor & 0xffff)); diff --git a/src/southbridge/amd/amd8111/lpc.c b/src/southbridge/amd/amd8111/lpc.c index 53dbf98c41..eab885dd49 100644 --- a/src/southbridge/amd/amd8111/lpc.c +++ b/src/southbridge/amd/amd8111/lpc.c @@ -124,8 +124,8 @@ static void amd8111_lpc_read_resources(struct device *dev) res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; } -static void lpci_set_subsystem(struct device *dev, unsigned vendor, - unsigned device) +static void lpci_set_subsystem(struct device *dev, unsigned int vendor, + unsigned int device) { pci_write_config32(dev, 0x70, ((device & 0xffff) << 16) | (vendor & 0xffff)); diff --git a/src/southbridge/amd/amd8111/nic.c b/src/southbridge/amd/amd8111/nic.c index edfc5844e5..30601fd630 100644 --- a/src/southbridge/amd/amd8111/nic.c +++ b/src/southbridge/amd/amd8111/nic.c @@ -75,8 +75,8 @@ static void nic_init(struct device *dev) printk(BIOS_DEBUG, "Done\n"); } -static void lpci_set_subsystem(struct device *dev, unsigned vendor, - unsigned device) +static void lpci_set_subsystem(struct device *dev, unsigned int vendor, + unsigned int device) { pci_write_config32(dev, 0xc8, ((device & 0xffff) << 16) | (vendor & 0xffff)); diff --git a/src/southbridge/amd/amd8111/smbus.c b/src/southbridge/amd/amd8111/smbus.c index 5ff17b8db6..375234ee85 100644 --- a/src/southbridge/amd/amd8111/smbus.c +++ b/src/southbridge/amd/amd8111/smbus.c @@ -23,8 +23,8 @@ #include "amd8111.h" -static void lpci_set_subsystem(struct device *dev, unsigned vendor, - unsigned device) +static void lpci_set_subsystem(struct device *dev, unsigned int vendor, + unsigned int device) { pci_write_config32(dev, 0x44, ((device & 0xffff) << 16) | (vendor & 0xffff)); diff --git a/src/southbridge/amd/amd8111/usb.c b/src/southbridge/amd/amd8111/usb.c index 62e41112df..0b5a038611 100644 --- a/src/southbridge/amd/amd8111/usb.c +++ b/src/southbridge/amd/amd8111/usb.c @@ -22,8 +22,8 @@ #include "amd8111.h" -static void lpci_set_subsystem(struct device *dev, unsigned vendor, - unsigned device) +static void lpci_set_subsystem(struct device *dev, unsigned int vendor, + unsigned int device) { pci_write_config32(dev, 0x70, ((device & 0xffff) << 16) | (vendor & 0xffff)); diff --git a/src/southbridge/amd/amd8111/usb2.c b/src/southbridge/amd/amd8111/usb2.c index be256098a5..5d0d6638bf 100644 --- a/src/southbridge/amd/amd8111/usb2.c +++ b/src/southbridge/amd/amd8111/usb2.c @@ -23,8 +23,8 @@ #if 0 -static void lpci_set_subsystem(struct device *dev, unsigned vendor, - unsigned device) +static void lpci_set_subsystem(struct device *dev, unsigned int vendor, + unsigned int device) { pci_write_config32(dev, 0x70, ((device & 0xffff) << 16) | (vendor & 0xffff)); diff --git a/src/southbridge/amd/cs5536/cs5536.h b/src/southbridge/amd/cs5536/cs5536.h index 4083f4f4eb..06c504a1aa 100644 --- a/src/southbridge/amd/cs5536/cs5536.h +++ b/src/southbridge/amd/cs5536/cs5536.h @@ -445,7 +445,7 @@ void cs5536_disable_internal_uart(void); void cs5536_early_setup(void); void cs5536_enable_smbus(void); -int smbus_read_byte(unsigned device, unsigned address); +int smbus_read_byte(unsigned int device, unsigned int address); #else void chipsetinit(void); #endif diff --git a/src/southbridge/amd/cs5536/early_smbus.c b/src/southbridge/amd/cs5536/early_smbus.c index ed2b9429b4..a1cf50bb15 100644 --- a/src/southbridge/amd/cs5536/early_smbus.c +++ b/src/southbridge/amd/cs5536/early_smbus.c @@ -33,7 +33,7 @@ void cs5536_enable_smbus(void) } -int smbus_read_byte(unsigned device, unsigned address) +int smbus_read_byte(unsigned int device, unsigned int address) { return do_smbus_read_byte(SMBUS_IO_BASE, device, address); } |