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authorMyles Watson <mylesgw@gmail.com>2010-06-09 22:41:35 +0000
committerMyles Watson <mylesgw@gmail.com>2010-06-09 22:41:35 +0000
commit894a34715f41f7c819a593dc3ff8e3033ffaa9fe (patch)
tree12ed2a5e10c6f181caa4c1add2ee8239abf82bfe /src/southbridge
parent6507b390467591928f16aab68f247321ad3f2262 (diff)
downloadcoreboot-894a34715f41f7c819a593dc3ff8e3033ffaa9fe.tar.xz
Same conversion as with resources from static arrays to lists, except
there is no free list. Converting resource arrays to lists reduced the size of each device struct from 1092 to 228 bytes. Converting link arrays to lists reduced the size of each device struct from 228 to 68 bytes. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5626 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/amd8131/amd8131_bridge.c2
-rw-r--r--src/southbridge/amd/amd8132/amd8132_bridge.c2
-rw-r--r--src/southbridge/amd/sb600/sb600_lpc.c6
-rw-r--r--src/southbridge/amd/sb700/sb700_lpc.c6
-rw-r--r--src/southbridge/broadcom/bcm5785/bcm5785_lpc.c6
-rw-r--r--src/southbridge/intel/i82801gx/i82801gx_pci.c4
-rw-r--r--src/southbridge/intel/pxhd/pxhd_bridge.c5
-rw-r--r--src/southbridge/nvidia/ck804/ck804_lpc.c6
-rw-r--r--src/southbridge/nvidia/ck804/ck804_smbus.c8
-rw-r--r--src/southbridge/nvidia/mcp55/mcp55_lpc.c6
-rw-r--r--src/southbridge/nvidia/mcp55/mcp55_smbus.c8
-rw-r--r--src/southbridge/sis/sis966/sis966_lpc.c6
12 files changed, 32 insertions, 33 deletions
diff --git a/src/southbridge/amd/amd8131/amd8131_bridge.c b/src/southbridge/amd/amd8131/amd8131_bridge.c
index ae2c4cffcb..d258450a06 100644
--- a/src/southbridge/amd/amd8131/amd8131_bridge.c
+++ b/src/southbridge/amd/amd8131/amd8131_bridge.c
@@ -25,7 +25,7 @@ static void amd8131_walk_children(struct bus *bus,
continue;
}
if (child->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
- amd8131_walk_children(&child->link[0], visit, ptr);
+ amd8131_walk_children(child->link_list, visit, ptr);
}
visit(child, ptr);
}
diff --git a/src/southbridge/amd/amd8132/amd8132_bridge.c b/src/southbridge/amd/amd8132/amd8132_bridge.c
index 5bbc3dc5ba..2ce46cd16a 100644
--- a/src/southbridge/amd/amd8132/amd8132_bridge.c
+++ b/src/southbridge/amd/amd8132/amd8132_bridge.c
@@ -47,7 +47,7 @@ static void amd8132_walk_children(struct bus *bus,
continue;
}
if (child->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
- amd8132_walk_children(&child->link[0], visit, ptr);
+ amd8132_walk_children(child->link_list, visit, ptr);
}
visit(child, ptr);
}
diff --git a/src/southbridge/amd/sb600/sb600_lpc.c b/src/southbridge/amd/sb600/sb600_lpc.c
index 0653772385..fd06f4478d 100644
--- a/src/southbridge/amd/sb600/sb600_lpc.c
+++ b/src/southbridge/amd/sb600/sb600_lpc.c
@@ -106,7 +106,7 @@ static void sb600_lpc_read_resources(device_t dev)
*/
static void sb600_lpc_enable_childrens_resources(device_t dev)
{
- u32 link;
+ struct bus *link;
u32 reg, reg_x;
int var_num = 0;
u16 reg_var[3];
@@ -114,9 +114,9 @@ static void sb600_lpc_enable_childrens_resources(device_t dev)
reg = pci_read_config32(dev, 0x44);
reg_x = pci_read_config32(dev, 0x48);
- for (link = 0; link < dev->links; link++) {
+ for (link = dev->link_list; link; link = link->next) {
device_t child;
- for (child = dev->link[link].children; child;
+ for (child = link->children; child;
child = child->sibling) {
enable_resources(child);
if (child->enabled
diff --git a/src/southbridge/amd/sb700/sb700_lpc.c b/src/southbridge/amd/sb700/sb700_lpc.c
index ab0a5ba6cc..e8bfbfac5d 100644
--- a/src/southbridge/amd/sb700/sb700_lpc.c
+++ b/src/southbridge/amd/sb700/sb700_lpc.c
@@ -118,7 +118,7 @@ static void sb700_lpc_set_resources(struct device *dev)
*/
static void sb700_lpc_enable_childrens_resources(device_t dev)
{
- u32 link;
+ struct bus *link;
u32 reg, reg_x;
int var_num = 0;
u16 reg_var[3];
@@ -126,9 +126,9 @@ static void sb700_lpc_enable_childrens_resources(device_t dev)
reg = pci_read_config32(dev, 0x44);
reg_x = pci_read_config32(dev, 0x48);
- for (link = 0; link < dev->links; link++) {
+ for (link = dev->link_list; link; link = link->next) {
device_t child;
- for (child = dev->link[link].children; child;
+ for (child = link->children; child;
child = child->sibling) {
enable_resources(child);
if (child->enabled
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c b/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c
index a80f5d79d5..3a876de69e 100644
--- a/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c
@@ -67,14 +67,14 @@ static void bcm5785_lpc_read_resources(device_t dev)
*/
static void bcm5785_lpc_enable_childrens_resources(device_t dev)
{
- unsigned link;
+ struct bus *link;
uint32_t reg;
reg = pci_read_config8(dev, 0x44);
- for (link = 0; link < dev->links; link++) {
+ for (link = dev->link_list; link; link = link->next) {
device_t child;
- for (child = dev->link[link].children; child; child = child->sibling) {
+ for (child = link->children; child; child = child->sibling) {
enable_resources(child);
if(child->enabled && (child->path.type == DEVICE_PATH_PNP)) {
struct resource *res;
diff --git a/src/southbridge/intel/i82801gx/i82801gx_pci.c b/src/southbridge/intel/i82801gx/i82801gx_pci.c
index c4c22f0ae8..1bdc67ae86 100644
--- a/src/southbridge/intel/i82801gx/i82801gx_pci.c
+++ b/src/southbridge/intel/i82801gx/i82801gx_pci.c
@@ -100,10 +100,10 @@ static void ich_pci_bus_enable_resources(struct device *dev)
/* enable IO in command register if there is VGA card
* connected with (even it does not claim IO resource)
*/
- if (dev->link[0].bridge_ctrl & PCI_BRIDGE_CTL_VGA)
+ if (dev->link_list->bridge_ctrl & PCI_BRIDGE_CTL_VGA)
dev->command |= PCI_COMMAND_IO;
ctrl = pci_read_config16(dev, PCI_BRIDGE_CONTROL);
- ctrl |= dev->link[0].bridge_ctrl;
+ ctrl |= dev->link_list->bridge_ctrl;
ctrl |= (PCI_BRIDGE_CTL_PARITY + PCI_BRIDGE_CTL_SERR); /* error check */
printk(BIOS_DEBUG, "%s bridge ctrl <- %04x\n", dev_path(dev), ctrl);
pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl);
diff --git a/src/southbridge/intel/pxhd/pxhd_bridge.c b/src/southbridge/intel/pxhd/pxhd_bridge.c
index bfce8b6087..1134f8f2f8 100644
--- a/src/southbridge/intel/pxhd/pxhd_bridge.c
+++ b/src/southbridge/intel/pxhd/pxhd_bridge.c
@@ -41,8 +41,7 @@ static unsigned int pxhd_scan_bridge(device_t dev, unsigned int max)
{
int bus_100Mhz = 0;
- dev->link[0].dev = dev;
- dev->links = 1;
+ dev->link_list->dev = dev;
get_option(&bus_100Mhz, "pxhd_bus_speed_100");
if(bus_100Mhz) {
@@ -58,7 +57,7 @@ static unsigned int pxhd_scan_bridge(device_t dev, unsigned int max)
pci_write_config16(dev, 0x40, word);
/* reset the bus to make the new frequencies effective */
- pci_bus_reset(&dev->link[0]);
+ pci_bus_reset(dev->link_list);
}
return pcix_scan_bridge(dev, max);
}
diff --git a/src/southbridge/nvidia/ck804/ck804_lpc.c b/src/southbridge/nvidia/ck804/ck804_lpc.c
index a6637cad1c..e626400557 100644
--- a/src/southbridge/nvidia/ck804/ck804_lpc.c
+++ b/src/southbridge/nvidia/ck804/ck804_lpc.c
@@ -231,15 +231,15 @@ static void ck804_lpc_read_resources(device_t dev)
*/
static void ck804_lpc_enable_childrens_resources(device_t dev)
{
- unsigned link;
+ struct bus *link;
uint32_t reg, reg_var[4];
int i, var_num = 0;
reg = pci_read_config32(dev, 0xa0);
- for (link = 0; link < dev->links; link++) {
+ for (link = dev->link_list; link; link = link->next) {
device_t child;
- for (child = dev->link[link].children; child; child = child->sibling) {
+ for (child = link->children; child; child = child->sibling) {
enable_resources(child);
if (child->enabled && (child->path.type == DEVICE_PATH_PNP)) {
struct resource *res;
diff --git a/src/southbridge/nvidia/ck804/ck804_smbus.c b/src/southbridge/nvidia/ck804/ck804_smbus.c
index 3d8c9cee77..cc75a10703 100644
--- a/src/southbridge/nvidia/ck804/ck804_smbus.c
+++ b/src/southbridge/nvidia/ck804/ck804_smbus.c
@@ -23,7 +23,7 @@ static int lsmbus_recv_byte(device_t dev)
device = dev->path.i2c.device;
pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, 0x20 + (pbus->link * 4));
+ res = find_resource(pbus->dev, 0x20 + (pbus->link_num * 4));
return do_smbus_recv_byte(res->base, device);
}
@@ -37,7 +37,7 @@ static int lsmbus_send_byte(device_t dev, uint8_t val)
device = dev->path.i2c.device;
pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, 0x20 + (pbus->link * 4));
+ res = find_resource(pbus->dev, 0x20 + (pbus->link_num * 4));
return do_smbus_send_byte(res->base, device, val);
}
@@ -51,7 +51,7 @@ static int lsmbus_read_byte(device_t dev, uint8_t address)
device = dev->path.i2c.device;
pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, 0x20 + (pbus->link * 4));
+ res = find_resource(pbus->dev, 0x20 + (pbus->link_num * 4));
return do_smbus_read_byte(res->base, device, address);
}
@@ -65,7 +65,7 @@ static int lsmbus_write_byte(device_t dev, uint8_t address, uint8_t val)
device = dev->path.i2c.device;
pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, 0x20 + (pbus->link * 4));
+ res = find_resource(pbus->dev, 0x20 + (pbus->link_num * 4));
return do_smbus_write_byte(res->base, device, address, val);
}
diff --git a/src/southbridge/nvidia/mcp55/mcp55_lpc.c b/src/southbridge/nvidia/mcp55/mcp55_lpc.c
index 0f9a50ca4f..0d32cb8275 100644
--- a/src/southbridge/nvidia/mcp55/mcp55_lpc.c
+++ b/src/southbridge/nvidia/mcp55/mcp55_lpc.c
@@ -205,16 +205,16 @@ static void mcp55_lpc_read_resources(device_t dev)
*/
static void mcp55_lpc_enable_childrens_resources(device_t dev)
{
- unsigned link;
uint32_t reg, reg_var[4];
int i;
int var_num = 0;
+ struct bus *link;
reg = pci_read_config32(dev, 0xa0);
- for (link = 0; link < dev->links; link++) {
+ for (link = dev->link_list; link; link = link->next) {
device_t child;
- for (child = dev->link[link].children; child; child = child->sibling) {
+ for (child = link->children; child; child = child->sibling) {
enable_resources(child);
if(child->enabled && (child->path.type == DEVICE_PATH_PNP)) {
struct resource *res;
diff --git a/src/southbridge/nvidia/mcp55/mcp55_smbus.c b/src/southbridge/nvidia/mcp55/mcp55_smbus.c
index fd28710d94..8e049a76a7 100644
--- a/src/southbridge/nvidia/mcp55/mcp55_smbus.c
+++ b/src/southbridge/nvidia/mcp55/mcp55_smbus.c
@@ -41,7 +41,7 @@ static int lsmbus_recv_byte(device_t dev)
device = dev->path.i2c.device;
pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, 0x20 + (pbus->link * 4));
+ res = find_resource(pbus->dev, 0x20 + (pbus->link_num * 4));
return do_smbus_recv_byte(res->base, device);
}
@@ -55,7 +55,7 @@ static int lsmbus_send_byte(device_t dev, uint8_t val)
device = dev->path.i2c.device;
pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, 0x20 + (pbus->link * 4));
+ res = find_resource(pbus->dev, 0x20 + (pbus->link_num * 4));
return do_smbus_send_byte(res->base, device, val);
}
@@ -69,7 +69,7 @@ static int lsmbus_read_byte(device_t dev, uint8_t address)
device = dev->path.i2c.device;
pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, 0x20 + (pbus->link * 4));
+ res = find_resource(pbus->dev, 0x20 + (pbus->link_num * 4));
return do_smbus_read_byte(res->base, device, address);
}
@@ -83,7 +83,7 @@ static int lsmbus_write_byte(device_t dev, uint8_t address, uint8_t val)
device = dev->path.i2c.device;
pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, 0x20 + (pbus->link * 4));
+ res = find_resource(pbus->dev, 0x20 + (pbus->link_num * 4));
return do_smbus_write_byte(res->base, device, address, val);
}
diff --git a/src/southbridge/sis/sis966/sis966_lpc.c b/src/southbridge/sis/sis966/sis966_lpc.c
index a3b79f078a..3b620cac45 100644
--- a/src/southbridge/sis/sis966/sis966_lpc.c
+++ b/src/southbridge/sis/sis966/sis966_lpc.c
@@ -198,16 +198,16 @@ static void sis966_lpc_read_resources(device_t dev)
*/
static void sis966_lpc_enable_childrens_resources(device_t dev)
{
- unsigned link;
+ struct bus *link;
uint32_t reg, reg_var[4];
int i;
int var_num = 0;
reg = pci_read_config32(dev, 0xa0);
- for (link = 0; link < dev->links; link++) {
+ for (link = dev->link_list; link; link = link->next) {
device_t child;
- for (child = dev->link[link].children; child; child = child->sibling) {
+ for (child = link->children; child; child = child->sibling) {
enable_resources(child);
if(child->enabled && (child->path.type == DEVICE_PATH_PNP)) {
struct resource *res;