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| author | Angel Pons <th3fanbus@gmail.com> | 2021-03-03 16:55:01 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-03-05 10:57:10 +0000 |
| commit | 8af3e0eb426ddec222d20e1fd92600b5042ab3b4 (patch) | |
| tree | 50af6f0de165d6ec0fa790d79d7fdcec25ee6935 /src/southbridge | |
| parent | ba7b90ecf216c8882d4b37579380e9a46d79e2f0 (diff) | |
| download | coreboot-8af3e0eb426ddec222d20e1fd92600b5042ab3b4.tar.xz | |
soc/intel/broadwell/pch: Use Lynx Point smbus.c
Continue unifying Lynx Point and Wildcat Point (PCH for Broadwell) code.
Define the WPT-LP SMBus PCI device ID, add it to smbus.c of Lynx Point,
and drop all now-unnecessary SMBus code from Broadwell.
Change-Id: I864d7c2dd47895a3c559e2f1219425cda9fd0c17
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51235
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/intel/lynxpoint/smbus.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/southbridge/intel/lynxpoint/smbus.c b/src/southbridge/intel/lynxpoint/smbus.c index e2d42acb23..32c9c14e40 100644 --- a/src/southbridge/intel/lynxpoint/smbus.c +++ b/src/southbridge/intel/lynxpoint/smbus.c @@ -40,6 +40,7 @@ static struct device_operations smbus_ops = { static const unsigned short pci_device_ids[] = { PCI_DEVICE_ID_INTEL_LPT_H_SMBUS, PCI_DEVICE_ID_INTEL_LPT_LP_SMBUS, + PCI_DEVICE_ID_INTEL_WPT_LP_SMBUS, 0 }; |