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authorKyösti Mälkki <kyosti.malkki@gmail.com>2020-06-30 11:42:52 +0300
committerAngel Pons <th3fanbus@gmail.com>2021-01-13 18:30:13 +0000
commit91946c5b137366ae283a5d2a075a415b0a403025 (patch)
tree31d8f1a02ec1f1c056fb64b13d94c688e2bffd3c /src/southbridge
parentc84572e0e1d17a4ccc77f5cc6e35f96417826663 (diff)
downloadcoreboot-91946c5b137366ae283a5d2a075a415b0a403025.tar.xz
ACPI: Have single call-site for acpi_inject_nvsa()
Change-Id: I61a9b07ec3fdaeef0622df82e106405f01e89a9e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48719 Reviewed-by: Lance Zhao Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/bd82x6x/lpc.c6
-rw-r--r--src/southbridge/intel/i82801gx/lpc.c6
-rw-r--r--src/southbridge/intel/i82801ix/lpc.c6
-rw-r--r--src/southbridge/intel/i82801jx/lpc.c6
-rw-r--r--src/southbridge/intel/ibexpeak/lpc.c6
-rw-r--r--src/southbridge/intel/lynxpoint/lpc.c6
6 files changed, 0 insertions, 36 deletions
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index bcdc75b083..73946d29bc 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -658,11 +658,6 @@ void soc_fill_gnvs(struct global_nvs *gnvs)
gnvs->pcnt = dev_count_cpu();
}
-void southbridge_inject_dsdt(const struct device *dev)
-{
- acpi_inject_nvsa();
-}
-
static const char *lpc_acpi_name(const struct device *dev)
{
return "LPCB";
@@ -710,7 +705,6 @@ static struct device_operations device_ops = {
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.write_acpi_tables = acpi_write_hpet,
- .acpi_inject_dsdt = southbridge_inject_dsdt,
.acpi_fill_ssdt = southbridge_fill_ssdt,
.acpi_name = lpc_acpi_name,
.init = lpc_init,
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index f07497c0bc..712624c619 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -489,11 +489,6 @@ void soc_fill_gnvs(struct global_nvs *gnvs)
gnvs->mpen = 1; /* Enable Multi Processing */
}
-void southbridge_inject_dsdt(const struct device *dev)
-{
- acpi_inject_nvsa();
-}
-
static const char *lpc_acpi_name(const struct device *dev)
{
return "LPCB";
@@ -508,7 +503,6 @@ static struct device_operations device_ops = {
.read_resources = i82801gx_lpc_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
- .acpi_inject_dsdt = southbridge_inject_dsdt,
.write_acpi_tables = acpi_write_hpet,
.acpi_fill_ssdt = southbridge_fill_ssdt,
.acpi_name = lpc_acpi_name,
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index fbe4af741d..0b58e67425 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -463,11 +463,6 @@ void *gnvs_chromeos_ptr(struct global_nvs *gnvs)
return 0;
}
-void southbridge_inject_dsdt(const struct device *dev)
-{
- acpi_inject_nvsa();
-}
-
static const char *lpc_acpi_name(const struct device *dev)
{
return "LPCB";
@@ -486,7 +481,6 @@ static struct device_operations device_ops = {
.read_resources = i82801ix_lpc_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
- .acpi_inject_dsdt = southbridge_inject_dsdt,
.write_acpi_tables = acpi_write_hpet,
.acpi_fill_ssdt = southbridge_fill_ssdt,
.acpi_name = lpc_acpi_name,
diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c
index 6c1c318237..26ba5d21e2 100644
--- a/src/southbridge/intel/i82801jx/lpc.c
+++ b/src/southbridge/intel/i82801jx/lpc.c
@@ -481,11 +481,6 @@ size_t gnvs_size_of_array(void)
return sizeof(struct global_nvs);
}
-void southbridge_inject_dsdt(const struct device *dev)
-{
- acpi_inject_nvsa();
-}
-
static const char *lpc_acpi_name(const struct device *dev)
{
return "LPCB";
@@ -504,7 +499,6 @@ static struct device_operations device_ops = {
.read_resources = i82801jx_lpc_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
- .acpi_inject_dsdt = southbridge_inject_dsdt,
.write_acpi_tables = acpi_write_hpet,
.acpi_fill_ssdt = southbridge_fill_ssdt,
.acpi_name = lpc_acpi_name,
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c
index 4db22f04f7..2a612ba517 100644
--- a/src/southbridge/intel/ibexpeak/lpc.c
+++ b/src/southbridge/intel/ibexpeak/lpc.c
@@ -553,11 +553,6 @@ void soc_fill_gnvs(struct global_nvs *gnvs)
gnvs->pcnt = dev_count_cpu();
}
-void southbridge_inject_dsdt(const struct device *dev)
-{
- acpi_inject_nvsa();
-}
-
static const char *lpc_acpi_name(const struct device *dev)
{
return "LPCB";
@@ -587,7 +582,6 @@ static struct device_operations device_ops = {
.read_resources = pch_lpc_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
- .acpi_inject_dsdt = southbridge_inject_dsdt,
.acpi_fill_ssdt = southbridge_fill_ssdt,
.acpi_name = lpc_acpi_name,
.write_acpi_tables = acpi_write_hpet,
diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c
index a17dfa4d56..a561f55776 100644
--- a/src/southbridge/intel/lynxpoint/lpc.c
+++ b/src/southbridge/intel/lynxpoint/lpc.c
@@ -701,11 +701,6 @@ void soc_fill_gnvs(struct global_nvs *gnvs)
gnvs->pcnt = dev_count_cpu();
}
-void southbridge_inject_dsdt(const struct device *dev)
-{
- acpi_inject_nvsa();
-}
-
static const char *lpc_acpi_name(const struct device *dev)
{
return "LPCB";
@@ -759,7 +754,6 @@ static struct device_operations device_ops = {
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.acpi_fill_ssdt = southbridge_fill_ssdt,
- .acpi_inject_dsdt = southbridge_inject_dsdt,
.acpi_name = lpc_acpi_name,
.write_acpi_tables = southbridge_write_acpi_tables,
.init = lpc_init,