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| author | Angel Pons <th3fanbus@gmail.com> | 2020-09-10 12:51:38 +0200 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2020-12-11 07:33:06 +0000 |
| commit | a7db40eae5b88d62f71487cf7e095e76d599420e (patch) | |
| tree | 75cdef1bd9462007ed23c43e8e465aa2ebcfc7af /src/southbridge | |
| parent | 254142a11df72092c2e381030884d07e5ada1133 (diff) | |
| download | coreboot-a7db40eae5b88d62f71487cf7e095e76d599420e.tar.xz | |
sb/intel/bd82x6x: Only check device ID in `intel_me_finalize_smm`
There's no need to compare the vendor ID.
Change-Id: I4368f2615e5ce72430992f1f5581908c90c970f0
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45258
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/me.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c index c51cca61d5..3876b02306 100644 --- a/src/southbridge/intel/bd82x6x/me.c +++ b/src/southbridge/intel/bd82x6x/me.c @@ -168,16 +168,16 @@ static void intel_me7_finalize_smm(void) void intel_me_finalize_smm(void) { - u32 did = pci_read_config32(PCH_ME_DEV, PCI_VENDOR_ID); + u16 did = pci_read_config16(PCH_ME_DEV, PCI_DEVICE_ID); switch (did) { - case 0x1c3a8086: + case 0x1c3a: intel_me7_finalize_smm(); break; - case 0x1e3a8086: + case 0x1e3a: intel_me8_finalize_smm(); break; default: - printk(BIOS_ERR, "No finalize handler for ME %08x.\n", did); + printk(BIOS_ERR, "No finalize handler for ME %04x.\n", did); } } |