diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-08-10 13:44:09 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-08-12 10:56:13 +0000 |
| commit | bcc2c729dd2ed7c60cb52f3852da5c3bc809c748 (patch) | |
| tree | 9e2c0f0183f8812178af8cdcf644888ec401c9e4 /src/southbridge | |
| parent | 28d10a23849f86d48bac2b860a6a72c9f3d88c10 (diff) | |
| download | coreboot-bcc2c729dd2ed7c60cb52f3852da5c3bc809c748.tar.xz | |
sb/intel/i82801ix/lpc.c: Align with i82801jx
Tested with BUILD_TIMELESS=1, Roda RK9 does not change.
Change-Id: I9445fac7db0a96b6a28ccf307f5ccedc1f94b8ab
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44334
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/intel/i82801ix/lpc.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index 6fe9bb9470..ad7141ac49 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -97,7 +97,7 @@ static void i82801ix_pirq_init(struct device *dev) */ for (irq_dev = all_devices; irq_dev; irq_dev = irq_dev->next) { - u8 int_pin=0, int_line=0; + u8 int_pin = 0, int_line = 0; if (!irq_dev->enabled || irq_dev->path.type != DEVICE_PATH_PCI) continue; @@ -160,8 +160,7 @@ static void i82801ix_power_options(struct device *dev) int nmi_option; /* BIOS must program... */ - reg32 = pci_read_config32(dev, 0xac); - pci_write_config32(dev, 0xac, reg32 | (1 << 30) | (3 << 8)); + pci_or_config32(dev, 0xac, (1 << 30) | (3 << 8)); /* Which state do we want to goto after g3 (power restored)? * 0 == S0 Full On @@ -477,7 +476,6 @@ void southbridge_inject_dsdt(const struct device *dev) } } - static const char *lpc_acpi_name(const struct device *dev) { return "LPCB"; |