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| author | Ravi Sarawadi <ravishankar.sarawadi@intel.com> | 2018-02-27 13:57:01 -0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-03-21 16:01:05 +0000 |
| commit | c293496f41f8a10929d9704427dc237747e2857c (patch) | |
| tree | ee9519605809c22ddba5129f6b68514e1abdf134 /src/southbridge | |
| parent | 794d0970721b2f74f85006b95c90a65dd87df534 (diff) | |
| download | coreboot-c293496f41f8a10929d9704427dc237747e2857c.tar.xz | |
mb/google/octopus: Enable TPM on GSPI
BUG=b:73133848
BRANCH=None
TEST=Build coreboot for Octopus board. Tested the GSPI interface
with a SPI EEPROM and got correct response to a RDID command
Change-Id: Ia10ab9da0055b54a96134a6e4c51b2a229a6fecf
Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com>
Reviewed-on: https://review.coreboot.org/24907
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge')
0 files changed, 0 insertions, 0 deletions