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authorJason Schildt <jschildt@gmail.com>2005-08-10 15:16:44 +0000
committerJason Schildt <jschildt@gmail.com>2005-08-10 15:16:44 +0000
commit043b409904c8663a2df1f651a91da6366eff6c9b (patch)
tree43be72a4df1429321c87e3c65c372e8ab1d45347 /src/southbridge
parent27b85118807be6e2fbf9bbd65d119538ff276db8 (diff)
downloadcoreboot-043b409904c8663a2df1f651a91da6366eff6c9b.tar.xz
Undoing all HDAMA commits from LNXI from r2005->2003
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2006 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/amd8111/Config.lb9
-rw-r--r--src/southbridge/amd/amd8111/amd8111_acpi.c5
-rw-r--r--src/southbridge/amd/amd8111/amd8111_lpc.c12
-rw-r--r--src/southbridge/amd/amd8111/amd8111_pci.c1
-rw-r--r--src/southbridge/amd/amd8111/amd8111_usb.c2
5 files changed, 16 insertions, 13 deletions
diff --git a/src/southbridge/amd/amd8111/Config.lb b/src/southbridge/amd/amd8111/Config.lb
index a69229260b..9b53c26da4 100644
--- a/src/southbridge/amd/amd8111/Config.lb
+++ b/src/southbridge/amd/amd8111/Config.lb
@@ -1,11 +1,12 @@
config chip.h
driver amd8111.o
-driver amd8111_usb.o
+#driver amd8111_usb.o
driver amd8111_lpc.o
driver amd8111_ide.o
driver amd8111_acpi.o
-driver amd8111_usb2.o
-driver amd8111_ac97.o
-driver amd8111_nic.o
+#driver amd8111_usb2.o
+#driver amd8111_ac97.o
+#driver amd8111_nic.o
driver amd8111_pci.o
driver amd8111_smbus.o
+object amd8111_reset.o
diff --git a/src/southbridge/amd/amd8111/amd8111_acpi.c b/src/southbridge/amd/amd8111/amd8111_acpi.c
index 209036adab..46a8e69510 100644
--- a/src/southbridge/amd/amd8111/amd8111_acpi.c
+++ b/src/southbridge/amd/amd8111/amd8111_acpi.c
@@ -97,7 +97,6 @@ static void acpi_init(struct device *dev)
#endif
- /* power after power fail */
on = MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
get_option(&on, "power_on_after_fail");
byte = pci_read_config8(dev, PREVIOUS_POWER_STATE);
@@ -107,7 +106,7 @@ static void acpi_init(struct device *dev)
}
pci_write_config8(dev, PREVIOUS_POWER_STATE, byte);
printk_info("set power %s after power fail\n", on?"on":"off");
-
+
/* Throttle the CPU speed down for testing */
on = SLOW_CPU_OFF;
get_option(&on, "slow_cpu");
@@ -178,7 +177,7 @@ static struct device_operations acpi_ops = {
.enable_resources = acpi_enable_resources,
.init = acpi_init,
.scan_bus = scan_static_bus,
- .enable = amd8111_enable,
+// .enable = amd8111_enable,
.ops_pci = &lops_pci,
.ops_smbus_bus = &lops_smbus_bus,
};
diff --git a/src/southbridge/amd/amd8111/amd8111_lpc.c b/src/southbridge/amd/amd8111/amd8111_lpc.c
index 49246d93d4..65c1ccb013 100644
--- a/src/southbridge/amd/amd8111/amd8111_lpc.c
+++ b/src/southbridge/amd/amd8111/amd8111_lpc.c
@@ -84,7 +84,7 @@ static void setup_ioapic(void)
return;
}
printk_spew("for IRQ, reg 0x%08x value 0x%08x 0x%08x\n",
- a->reg, a->value_low, a->value_high);
+ a->reg, a->value_low, a->value_high);
}
}
@@ -113,9 +113,13 @@ static void lpc_init(struct device *dev)
byte = pci_read_config8(dev, 0x46);
pci_write_config8(dev, 0x46, byte | (1<<0));
- /* Enable 5Mib Rom window */
+ /* power after power fail */
byte = pci_read_config8(dev, 0x43);
- byte |= 0xC0;
+ if (pwr_on) {
+ byte &= ~(1<<6);
+ } else {
+ byte |= (1<<6);
+ }
pci_write_config8(dev, 0x43, byte);
/* Enable Port 92 fast reset */
@@ -175,7 +179,7 @@ static void amd8111_lpc_enable_resources(device_t dev)
static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
{
pci_write_config32(dev, 0x70,
- ((device & 0xffff) << 16) | (vendor & 0xffff));
+ ((device & 0xffff) << 16) | (vendor & 0xffff));
}
static struct pci_operations lops_pci = {
diff --git a/src/southbridge/amd/amd8111/amd8111_pci.c b/src/southbridge/amd/amd8111/amd8111_pci.c
index b9a9b3578d..9fe1f98d32 100644
--- a/src/southbridge/amd/amd8111/amd8111_pci.c
+++ b/src/southbridge/amd/amd8111/amd8111_pci.c
@@ -55,7 +55,6 @@ static struct device_operations pci_ops = {
.enable_resources = pci_bus_enable_resources,
.init = pci_init,
.scan_bus = pci_scan_bridge,
- /* PCI Subordinate bus reset is not implemented */
.ops_pci = &lops_pci,
};
diff --git a/src/southbridge/amd/amd8111/amd8111_usb.c b/src/southbridge/amd/amd8111/amd8111_usb.c
index ed9f133af2..5a01a97c58 100644
--- a/src/southbridge/amd/amd8111/amd8111_usb.c
+++ b/src/southbridge/amd/amd8111/amd8111_usb.c
@@ -26,7 +26,7 @@ static struct device_operations usb_ops = {
.enable_resources = pci_dev_enable_resources,
.init = 0,
.scan_bus = scan_static_bus,
- .enable = amd8111_enable,
+// .enable = amd8111_enable,
.ops_pci = &lops_pci,
};