sb/intel: Use defined CONFIG_HPET_ADDRESS

Change-Id: I15ae5e70ba351e89d5ea9d04dbb1efdfbb372bba
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36458
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

6 files changed, 24 insertions, 24 deletions

diff --git a/src/southbridge/intel/bd82x6x/acpi/lpc.asl b/src/southbridge/intel/bd82x6x/acpi/lpc.asl
index 5204b29d48..06c9ada15b 100644
--- a/src/southbridge/intel/bd82x6x/acpi/lpc.asl
+++ b/src/southbridge/intel/bd82x6x/acpi/lpc.asl
@@ -97,7 +97,7 @@ Device (LPCB)
 
 		Name(BUF0, ResourceTemplate()
 		{
-			Memory32Fixed(ReadOnly, 0xfed00000, 0x400, FED0)
+			Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
 		})
 
 		Method (_STA, 0)	// Device Status
@@ -120,15 +120,15 @@ Device (LPCB)
 			If (HPTE) {
 				CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
 				If (Lequal(HPAS, 1)) {
-					Store(0xfed01000, HPT0)
+					Add(CONFIG_HPET_ADDRESS, 0x1000, HPT0)
 				}
 
 				If (Lequal(HPAS, 2)) {
-					Store(0xfed02000, HPT0)
+					Add(CONFIG_HPET_ADDRESS, 0x2000, HPT0)
 				}
 
 				If (Lequal(HPAS, 3)) {
-					Store(0xfed03000, HPT0)
+					Add(CONFIG_HPET_ADDRESS, 0x3000, HPT0)
 				}
 			}
 
diff --git a/src/southbridge/intel/fsp_rangeley/acpi/lpc.asl b/src/southbridge/intel/fsp_rangeley/acpi/lpc.asl
index b53e98f6ce..a896dadc98 100644
--- a/src/southbridge/intel/fsp_rangeley/acpi/lpc.asl
+++ b/src/southbridge/intel/fsp_rangeley/acpi/lpc.asl
@@ -97,7 +97,7 @@ Device (LPCB)
 
 		Name(BUF0, ResourceTemplate()
 		{
-			Memory32Fixed(ReadOnly, 0xfed00000, 0x400, FED0)
+			Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
 		})
 
 		Method (_STA, 0)	// Device Status
@@ -120,15 +120,15 @@ Device (LPCB)
 			If (HPTE) {
 				CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
 				If (Lequal(HPAS, 1)) {
-					Store(0xfed01000, HPT0)
+					Add(CONFIG_HPET_ADDRESS, 0x1000, HPT0)
 				}
 
 				If (Lequal(HPAS, 2)) {
-					Store(0xfed02000, HPT0)
+					Add(CONFIG_HPET_ADDRESS, 0x2000, HPT0)
 				}
 
 				If (Lequal(HPAS, 3)) {
-					Store(0xfed03000, HPT0)
+					Add(CONFIG_HPET_ADDRESS, 0x3000, HPT0)
 				}
 			}
 
diff --git a/src/southbridge/intel/i82801gx/acpi/lpc.asl b/src/southbridge/intel/i82801gx/acpi/lpc.asl
index 87eab07288..d5201b2fff 100644
--- a/src/southbridge/intel/i82801gx/acpi/lpc.asl
+++ b/src/southbridge/intel/i82801gx/acpi/lpc.asl
@@ -79,7 +79,7 @@ Device (LPCB)
 
 		Name(BUF0, ResourceTemplate()
 		{
-			Memory32Fixed(ReadOnly, 0xfed00000, 0x400, FED0)
+			Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
 		})
 
 		Method (_STA, 0)	// Device Status
@@ -102,15 +102,15 @@ Device (LPCB)
 			If (HPTE) {
 				CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
 				If (Lequal(HPAS, 1)) {
-					Store(0xfed01000, HPT0)
+					Add(CONFIG_HPET_ADDRESS, 0x1000, HPT0)
 				}
 
 				If (Lequal(HPAS, 2)) {
-					Store(0xfed02000, HPT0)
+					Add(CONFIG_HPET_ADDRESS, 0x2000, HPT0)
 				}
 
 				If (Lequal(HPAS, 3)) {
-					Store(0xfed03000, HPT0)
+					Add(CONFIG_HPET_ADDRESS, 0x3000, HPT0)
 				}
 			}
 
diff --git a/src/southbridge/intel/i82801ix/acpi/lpc.asl b/src/southbridge/intel/i82801ix/acpi/lpc.asl
index 9d27b0b482..07ce43aa89 100644
--- a/src/southbridge/intel/i82801ix/acpi/lpc.asl
+++ b/src/southbridge/intel/i82801ix/acpi/lpc.asl
@@ -79,7 +79,7 @@ Device (LPCB)
 
 		Name(BUF0, ResourceTemplate()
 		{
-			Memory32Fixed(ReadOnly, 0xfed00000, 0x400, FED0)
+			Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
 		})
 
 		Method (_STA, 0)	// Device Status
@@ -102,15 +102,15 @@ Device (LPCB)
 			If (HPTE) {
 				CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
 				If (Lequal(HPAS, 1)) {
-					Store(0xfed01000, HPT0)
+					Add(CONFIG_HPET_ADDRESS, 0x1000, HPT0)
 				}
 
 				If (Lequal(HPAS, 2)) {
-					Store(0xfed02000, HPT0)
+					Add(CONFIG_HPET_ADDRESS, 0x2000, HPT0)
 				}
 
 				If (Lequal(HPAS, 3)) {
-					Store(0xfed03000, HPT0)
+					Add(CONFIG_HPET_ADDRESS, 0x3000, HPT0)
 				}
 			}
 
diff --git a/src/southbridge/intel/i82801jx/acpi/lpc.asl b/src/southbridge/intel/i82801jx/acpi/lpc.asl
index 1d9e54e237..7f16e08fae 100644
--- a/src/southbridge/intel/i82801jx/acpi/lpc.asl
+++ b/src/southbridge/intel/i82801jx/acpi/lpc.asl
@@ -79,7 +79,7 @@ Device (LPCB)
 
 		Name(BUF0, ResourceTemplate()
 		{
-			Memory32Fixed(ReadOnly, 0xfed00000, 0x400, FED0)
+			Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
 		})
 
 		Method (_STA, 0)	// Device Status
@@ -102,15 +102,15 @@ Device (LPCB)
 			If (HPTE) {
 				CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
 				If (Lequal(HPAS, 1)) {
-					Store(0xfed01000, HPT0)
+					Add(CONFIG_HPET_ADDRESS, 0x1000, HPT0)
 				}
 
 				If (Lequal(HPAS, 2)) {
-					Store(0xfed02000, HPT0)
+					Add(CONFIG_HPET_ADDRESS, 0x2000, HPT0)
 				}
 
 				If (Lequal(HPAS, 3)) {
-					Store(0xfed03000, HPT0)
+					Add(CONFIG_HPET_ADDRESS, 0x3000, HPT0)
 				}
 			}
 
diff --git a/src/southbridge/intel/lynxpoint/acpi/lpc.asl b/src/southbridge/intel/lynxpoint/acpi/lpc.asl
index b677e6a543..ddd5a2f53d 100644
--- a/src/southbridge/intel/lynxpoint/acpi/lpc.asl
+++ b/src/southbridge/intel/lynxpoint/acpi/lpc.asl
@@ -83,7 +83,7 @@ Device (LPCB)
 
 		Name(BUF0, ResourceTemplate()
 		{
-			Memory32Fixed(ReadOnly, 0xfed00000, 0x400, FED0)
+			Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
 		})
 
 		Method (_STA, 0)	// Device Status
@@ -106,15 +106,15 @@ Device (LPCB)
 			If (HPTE) {
 				CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
 				If (Lequal(HPAS, 1)) {
-					Store(0xfed01000, HPT0)
+					Add(CONFIG_HPET_ADDRESS, 0x1000, HPT0)
 				}
 
 				If (Lequal(HPAS, 2)) {
-					Store(0xfed02000, HPT0)
+					Add(CONFIG_HPET_ADDRESS, 0x2000, HPT0)
 				}
 
 				If (Lequal(HPAS, 3)) {
-					Store(0xfed03000, HPT0)
+					Add(CONFIG_HPET_ADDRESS, 0x3000, HPT0)
 				}
 			}