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authorAntonello Dettori <dev@dettori.io>2016-09-01 17:04:14 +0200
committerMartin Roth <martinroth@google.com>2016-09-13 17:21:31 +0200
commit196e3d439ee14cdf102b88c162b2f2ed871f0205 (patch)
tree2c3027f3afe596e95a01b1d16e6915ab56bcddc0 /src/southbridge
parent25f75b28e4e545eb2c42e4e201055661e57a90ca (diff)
downloadcoreboot-196e3d439ee14cdf102b88c162b2f2ed871f0205.tar.xz
southbridge/intel/i82801ix: transition away from device_t
Replace the use of the old device_t definition inside southbridge/intel/i82801ix. The patch has been tested both with the arch/io.h definition of device_t enabled and disabled in order to ensure compatibility while the transaction takes place. Change-Id: Ibf20e6c08994b09d2a2e68a1a1d38a7a477493aa Signed-off-by: Antonello Dettori <dev@dettori.io> Reviewed-on: https://review.coreboot.org/16403 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/i82801ix/early_init.c2
-rw-r--r--src/southbridge/intel/i82801ix/early_smbus.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/i82801ix/early_init.c b/src/southbridge/intel/i82801ix/early_init.c
index 3d94b566b1..c40f9b73ea 100644
--- a/src/southbridge/intel/i82801ix/early_init.c
+++ b/src/southbridge/intel/i82801ix/early_init.c
@@ -19,7 +19,7 @@
void i82801ix_early_init(void)
{
- const device_t d31f0 = PCI_DEV(0, 0x1f, 0);
+ const pci_devfn_t d31f0 = PCI_DEV(0, 0x1f, 0);
/* Set up RCBA. */
pci_write_config32(d31f0, D31F0_RCBA, (uintptr_t)DEFAULT_RCBA | 1);
diff --git a/src/southbridge/intel/i82801ix/early_smbus.c b/src/southbridge/intel/i82801ix/early_smbus.c
index 3cac32f3b3..31b33e92d9 100644
--- a/src/southbridge/intel/i82801ix/early_smbus.c
+++ b/src/southbridge/intel/i82801ix/early_smbus.c
@@ -24,7 +24,7 @@
void enable_smbus(void)
{
- device_t dev;
+ pci_devfn_t dev;
/* Set the SMBus device statically. */
dev = PCI_DEV(0x0, 0x1f, 0x3);