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authorAntonello Dettori <dev@dettori.io>2016-09-03 10:45:33 +0200
committerMartin Roth <martinroth@google.com>2016-09-13 17:18:07 +0200
commit1ac972804896db7925800dcf316eb463eb7b2972 (patch)
tree4ced173041146ab8598a9f1242697a124b1e4719 /src/southbridge
parent1e1b866d28bb57ec7fd9778d2fb9e26aacefa34b (diff)
downloadcoreboot-1ac972804896db7925800dcf316eb463eb7b2972.tar.xz
southbridge/amd/pi/hudson: transition away from device_t
Replace the use of the old device_t definition inside southbridge/amd/pi/hudson. Change-Id: I8b22a8d9f0e90afaf0f218c5c0924a78883b7498 Signed-off-by: Antonello Dettori <dev@dettori.io> Reviewed-on: https://review.coreboot.org/16475 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/pi/hudson/early_setup.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/southbridge/amd/pi/hudson/early_setup.c b/src/southbridge/amd/pi/hudson/early_setup.c
index f4fcf8b472..dce16206f0 100644
--- a/src/southbridge/amd/pi/hudson/early_setup.c
+++ b/src/southbridge/amd/pi/hudson/early_setup.c
@@ -60,7 +60,7 @@ void configure_hudson_uart(void)
void hudson_pci_port80(void)
{
u8 byte;
- device_t dev;
+ pci_devfn_t dev;
/* P2P Bridge */
dev = PCI_DEV(0, 0x14, 4);
@@ -105,7 +105,7 @@ void hudson_pci_port80(void)
void hudson_lpc_port80(void)
{
u8 byte;
- device_t dev;
+ pci_devfn_t dev;
/* Enable LPC controller */
outb(0xEC, 0xCD6);
@@ -123,7 +123,7 @@ void hudson_lpc_port80(void)
void hudson_lpc_decode(void)
{
- device_t dev;
+ pci_devfn_t dev;
u32 tmp = 0;
/* Enable I/O decode to LPC bus */