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authorKyösti Mälkki <kyosti.malkki@gmail.com>2014-06-15 14:28:23 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-11-28 07:45:17 +0100
commit24d875bddc5812b3b9041f557019fea14a71ebe7 (patch)
tree88cc4158b9b7b94d1570a1f6326fc1beeefe8de1 /src/southbridge
parent58b532d586238abfa19d49f1c4e6d64908a4361c (diff)
downloadcoreboot-24d875bddc5812b3b9041f557019fea14a71ebe7.tar.xz
ACPI: Remove CBMEM TOC from GNVS
This existed for ChromeOS but was no longer used with DYNAMIC_CBMEM. See commit a0b4a8d. Change-Id: Iae82498ab729df5682d89e66bb9de96457e91619 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7465 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/fsp_rangeley/nvs.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/fsp_rangeley/nvs.h b/src/southbridge/intel/fsp_rangeley/nvs.h
index 6578bbf189..97362eab4b 100644
--- a/src/southbridge/intel/fsp_rangeley/nvs.h
+++ b/src/southbridge/intel/fsp_rangeley/nvs.h
@@ -71,7 +71,7 @@ typedef struct {
u8 s3u0; /* 0x35 - Enable USB0 in S3 */
u8 s3u1; /* 0x36 - Enable USB1 in S3 */
u8 s33g; /* 0x37 - Enable S3 in 3G */
- u32 cmem; /* 0x38 - CBMEM TOC */
+ u32 obsolete_cmem; /* 0x38 - CBMEM TOC */
/* Integrated Graphics Device */
u8 igds; /* 0x3c - IGD state */
u8 tlst; /* 0x3d - Display Toggle List Pointer */