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authorzbao <fishbaozi@gmail.com>2015-06-17 20:03:29 -0400
committerZheng Bao <zheng.bao@amd.com>2015-06-25 04:06:59 +0200
commit3ad1f1ca5fb35d698359c88baaa57939a258639a (patch)
treed10b232e21eb91e69f56b49e5be76b41fae4257e /src/southbridge
parent128043edeea673f87c8a5d6dbcaf9f728d6c0869 (diff)
downloadcoreboot-3ad1f1ca5fb35d698359c88baaa57939a258639a.tar.xz
amd/pi/hudson: Fill ROMSIG with 0xFF instead of 0
Besides the first five DWORDs, the offsets 0x40 & 0x41 are used to save SPI settings. They should only be 0xFF for being written. Other parts in ROMSIG are also changed to 0xFF for potential requirement. Change-Id: I61ea8295d5ee8ffbbd0cfcf9e4bece770d70e1f2 Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/10651 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/pi/hudson/Makefile.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/pi/hudson/Makefile.inc b/src/southbridge/amd/pi/hudson/Makefile.inc
index ccca421857..235ce1e3ec 100644
--- a/src/southbridge/amd/pi/hudson/Makefile.inc
+++ b/src/southbridge/amd/pi/hudson/Makefile.inc
@@ -116,7 +116,7 @@ $(obj)/coreboot_hudson_romsig.bin: $(call strip_quotes, $(CONFIG_HUDSON_XHCI_FWM
$(call strip_quotes, $(CONFIG_HUDSON_GEC_FWM_FILE)) \
$(obj)/config.h
echo " Hudson FW $@"
- dd if=/dev/zero of=$@ count=$(ROMSIG_SIZE) ibs=1 status=noxfer 2>/dev/null; \
+ printf %d $(ROMSIG_SIZE) | LC_ALL=C awk '{for (i=0; i<$$1; i++) {printf "%c", 255}}' > $@; \
for fwm in 1437226410 \
$(HUDSON_IMC_POSITION) \
$(HUDSON_GEC_POSITION) \