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authorDuncan Laurie <dlaurie@chromium.org>2013-08-22 09:56:42 -0700
committerPatrick Georgi <patrick@georgi-clan.de>2014-07-04 17:50:22 +0200
commit5a45b04ac0e4a296f1df1984200766151c66c42c (patch)
tree8c45826664895b65a019c4a12530c9e7c77ff999 /src/southbridge
parent78145a56b4f0332804d3b843f0ca855821308d83 (diff)
downloadcoreboot-5a45b04ac0e4a296f1df1984200766151c66c42c.tar.xz
intel/lynxpoint: Add CONFIG_LOCK_MANAGEMENT_ENGINE entry to Kconfig
This was missing from lynxpoint. BUG=chrome-os-partner:21796 BRANCH=falco,peppy TEST=emerge-falco chromeos-coreboot-falco Change-Id: Id1b261a5310ce1482f11c8c032c13f49046742fc Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/66669 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/6012 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/lynxpoint/Kconfig13
1 files changed, 13 insertions, 0 deletions
diff --git a/src/southbridge/intel/lynxpoint/Kconfig b/src/southbridge/intel/lynxpoint/Kconfig
index 0ad39a0cd9..0ba61bc29f 100644
--- a/src/southbridge/intel/lynxpoint/Kconfig
+++ b/src/southbridge/intel/lynxpoint/Kconfig
@@ -136,4 +136,17 @@ config FINALIZE_USB_ROUTE_XHCI
If you set this option to y, the USB ports will be routed
to the XHCI controller during the finalize SMM callback.
+config LOCK_MANAGEMENT_ENGINE
+ bool "Lock Management Engine section"
+ default n
+ help
+ The Intel Management Engine supports preventing write accesses
+ from the host to the Management Engine section in the firmware
+ descriptor. If the ME section is locked, it can only be overwritten
+ with an external SPI flash programmer. You will want this if you
+ want to increase security of your ROM image once you are sure
+ that the ME firmware is no longer going to change.
+
+ If unsure, say N.
+
endif